--- /sys/doc/port.ms Wed Jan 30 23:15:08 2013 +++ /sys/doc/port.ms Thu Feb 21 23:07:07 2013 @@ -294,10 +294,10 @@ .SH The Broadcom 2835 operating system .PP -This is terminal and CPU kernels for the ARM1176 processor +This consists of terminal and CPU kernels for the ARM1176 processor in the Broadcom 2835 system-on-a-chip. The hardware includes VFP2 floating-point. -It runs on the Raspberry Pi Model B. +It runs on the Raspberry Pi Models A and B. . .ig .SH --- /sys/include/a.out.h Fri Sep 21 01:27:10 2012 +++ /sys/include/a.out.h Mon Feb 25 23:23:00 2013 @@ -14,7 +14,7 @@ #define HDR_MAGIC 0x00008000 /* header expansion */ #define _MAGIC(f, b) ((f)|((((4*(b))+0)*(b))+7)) -#define A_MAGIC _MAGIC(0, 8) /* 68020 */ +#define A_MAGIC _MAGIC(0, 8) /* 68020 (retired) */ #define I_MAGIC _MAGIC(0, 11) /* intel 386 */ #define J_MAGIC _MAGIC(0, 12) /* intel 960 (retired) */ #define K_MAGIC _MAGIC(0, 13) /* sparc */ --- /sys/man/1/8l Fri Jan 25 01:18:34 2013 +++ /sys/man/1/8l Sat Feb 23 00:23:43 2013 @@ -159,6 +159,8 @@ .I 5l generates arm7500 floating-point instructions which are emulated in the kernel. +.br +.ne 6 .TP .BI -H n Executable header is type @@ -169,11 +171,26 @@ The Next boot format is 3. Type 4 in .I vl creates a MIPS executable for an SGI Unix system. +There is often a type that produces ELF or ELF64 format; +5 for ELF is common. +See +.B obj.c +in the source directory for a complete list. +.TP +.B -P +(ELF only) +Executable is standalone boot image or kernel. .TP .BI -T t -The text segment starts at address +The text segment starts at (virtual) address .IR t . .TP +.BI -F t +(ELF only) +The text segment starts at physical address +.I t +(by default the text segment's virtual start address). +.TP .BI -D d The data segment starts at address .IR d . @@ -211,7 +228,7 @@ .BI -l lib arguments. .SH SOURCE -.B /sys/src/cmd/8l +.BR /sys/src/cmd/8l , etc. .SH "SEE ALSO" .IR 8c (1), --- /sys/man/8/9boot Fri Dec 7 21:11:14 2012 +++ /sys/man/8/9boot Mon Feb 25 02:56:36 2013 @@ -185,7 +185,7 @@ .IR 9load , the .I bootfile -may be compressed with +may be a Plan 9 boot image compressed with .IR gzip (1). In all cases, the uncompressed kernel must be in Plan 9 boot image or ELF format. @@ -532,6 +532,7 @@ common kernel source .PD .SH "SEE ALSO" +.IR 8l (1), .IR cons (3), .IR booting (8), .IR dhcpd (8), --- /sys/src/9/bcm/archbcm.c Fri Jan 11 21:28:55 2013 +++ /sys/src/9/bcm/archbcm.c Thu Feb 21 22:22:37 2013 @@ -18,6 +18,7 @@ enum { Wdogfreq = 65536, + Wdogtime = 5, /* seconds, ≤ 15 */ }; /* @@ -28,6 +29,7 @@ Password = 0x5A<<24, CfgMask = 0x03<<4, CfgReset = 0x02<<4, + Rsts = 0x20>>2, Wdog = 0x24>>2, }; @@ -50,6 +52,25 @@ ; } +static void +wdogfeed(void) +{ + u32int *r; + + r = (u32int*)POWERREGS; + r[Wdog] = Password | (Wdogtime * Wdogfreq); + r[Rstc] = Password | (r[Rstc] & ~CfgMask) | CfgReset; +} + +void +wdogoff(void) +{ + u32int *r; + + r = (u32int*)POWERREGS; + r[Rstc] = Password | (r[Rstc] & ~CfgMask); +} + void cpuidprint(void) { @@ -59,6 +80,7 @@ void archbcmlink(void) { + addclock0link(wdogfeed, HZ); } int --- /sys/src/9/bcm/clock.c Tue Jan 29 23:07:49 2013 +++ /sys/src/9/bcm/clock.c Thu Feb 21 22:22:37 2013 @@ -84,6 +84,7 @@ tm = (Armtimer*)ARMTIMER; tm->ctl = 0; + wdogoff(); } void --- /sys/src/9/bcm/fns.h Fri Jan 25 23:05:05 2013 +++ /sys/src/9/bcm/fns.h Thu Feb 21 22:22:37 2013 @@ -73,6 +73,7 @@ extern int userureg(Ureg*); extern void vectors(void); extern void vtable(void); +extern void wdogoff(void); /* * floating point emulation --- /sys/src/cmd/5l/sched.c Thu Feb 28 23:40:32 2002 +++ /sys/src/cmd/5l/sched.c Thu Jan 1 01:00:00 1970 @@ -1,645 +0,0 @@ -#include "l.h" - -enum -{ - E_PSR = 1<<0, - E_MEM = 1<<3, - E_MEMSP = 1<<4, /* uses offset and size */ - E_MEMSB = 1<<5, /* uses offset and size */ - ANYMEM = E_MEM|E_MEMSP|E_MEMSB, - DELAY = BRANCH|LOAD|FCMP, -}; - -typedef struct Sch Sch; -typedef struct Dep Dep; - -struct Dep -{ - ulong ireg; - ulong freg; - ulong cc; -}; -struct Sch -{ - Prog p; - Dep set; - Dep used; - long offset; - char size; - char nop; - char comp; -}; - -void regused(Sch*, Prog*); -int depend(Sch*, Sch*); -int conflict(Sch*, Sch*); -int offoverlap(Sch*, Sch*); -void dumpbits(Sch*, Dep*); - -void -sched(Prog *p0, Prog *pe) -{ - Prog *p, *q; - Sch sch[NSCHED], *s, *t, *u, *se, stmp; - - /* - * build side structure - */ - s = sch; - for(p=p0;; p=p->link) { - memset(s, 0, sizeof(*s)); - s->p = *p; - regused(s, p); - if(debug['X']) { - Bprint(&bso, "%P\t\tset", &s->p); - dumpbits(s, &s->set); - Bprint(&bso, "; used"); - dumpbits(s, &s->used); - if(s->comp) - Bprint(&bso, "; compound"); - if(s->p.mark & LOAD) - Bprint(&bso, "; load"); - if(s->p.mark & BRANCH) - Bprint(&bso, "; branch"); - if(s->p.mark & FCMP) - Bprint(&bso, "; fcmp"); - Bprint(&bso, "\n"); - } - if(p == pe) - break; - s++; - } - se = s; - - /* - * prepass to move things around - * does nothing, but tries to make - * the actual scheduler work better - */ - for(s=sch; s<=se; s++) { - if(!(s->p.mark & LOAD)) - continue; - /* always good to put nonconflict loads together */ - for(t=s+1; t<=se; t++) { - if(!(t->p.mark & LOAD)) - continue; - if(t->p.mark & BRANCH) - break; - if(conflict(s, t)) - break; - for(u=t-1; u>s; u--) - if(depend(u, t)) - goto no11; - u = s+1; - stmp = *t; - memmove(s+2, u, (uchar*)t - (uchar*)u); - *u = stmp; - break; - } - no11: - - /* put schedule fodder above load */ - for(t=s+1; t<=se; t++) { - if(t->p.mark & BRANCH) - break; - if(s > sch && conflict(s-1, t)) - continue; - for(u=t-1; u>=s; u--) - if(depend(t, u)) - goto no1; - stmp = *t; - memmove(s+1, s, (uchar*)t - (uchar*)s); - *s = stmp; - if(!(s->p.mark & LOAD)) - break; - no1:; - } - } - - for(s=se; s>=sch; s--) { - if(!(s->p.mark & DELAY)) - continue; - if(s < se) - if(!conflict(s, s+1)) - goto out3; - /* - * s is load, s+1 is immediate use of result or end of block - * t is the trial instruction to insert between s and s+1 - */ - if(!debug['Y']) - for(t=s-1; t>=sch; t--) { - if(t->comp) - if(s->p.mark & BRANCH) - goto no2; - if(t->p.mark & DELAY) - if(s >= se || conflict(t, s+1)) - goto no2; - for(u=t+1; u<=s; u++) - if(depend(u, t)) - goto no2; - goto out2; - no2:; - } - if(debug['X']) - Bprint(&bso, "?l%P\n", &s->p); - s->nop = 1; - if(debug['v']) { - if(s->p.mark & LOAD) { - nop.load.count++; - nop.load.outof++; - } - if(s->p.mark & BRANCH) { - nop.branch.count++; - nop.branch.outof++; - } - if(s->p.mark & FCMP) { - nop.fcmp.count++; - nop.fcmp.outof++; - } - } - continue; - - out2: - if(debug['X']) { - Bprint(&bso, "!l%P\n", &t->p); - Bprint(&bso, "%P\n", &s->p); - } - stmp = *t; - memmove(t, t+1, (uchar*)s - (uchar*)t); - *s = stmp; - s--; - - out3: - if(debug['v']) { - if(s->p.mark & LOAD) - nop.load.outof++; - if(s->p.mark & BRANCH) - nop.branch.outof++; - if(s->p.mark & FCMP) - nop.fcmp.outof++; - } - } - - /* Avoid HI/LO use->set */ - t = sch+1; - for(s=sch; sused.cc & E_PSR) == 0) - continue; - if(t->set.cc & E_PSR) - s->nop = 2; - } - - /* - * put it all back - */ - for(s=sch, p=p0; s<=se; s++, p=q) { - q = p->link; - if(q != s->p.link) { - *p = s->p; - p->link = q; - } - while(s->nop--) - addnop(p); - } - if(debug['X']) { - Bprint(&bso, "\n"); - Bflush(&bso); - } -} - -void -regused(Sch *s, Prog *realp) -{ - int c, ar, ad, ld, sz; - ulong m; - Prog *p; - - p = &s->p; - s->comp = compound(p); - s->nop = 0; - if(s->comp) { - s->set.ireg |= 1<used.ireg |= 1<as) { - case ATEXT: - curtext = realp; - autosize = p->to.offset + 4; - ad = 1; - break; - case ABL: - c = p->reg; - if(c == NREG) - c = REGLINK; - s->set.ireg |= 1<set.cc |= E_PSR; - p->mark |= FCMP; - break; - case AB: - ar = 1; - ad = 1; - break; - case AMOVB: - case AMOVBU: - sz = 1; - ld = 1; - break; - case AMOVH: - case AMOVHU: - sz = 2; - ld = 1; - break; - case AMOVF: - case AMOVW: - sz = 4; - ld = 1; - break; - case AMOVD: - sz = 8; - ld = 1; - break; - case ADIV: - case ADIVU: - case AMUL: - case AMULU: - case AMOD: - case AMODU: - - case AADD: - case AAND: - case ANOR: - case AORR: - case ASLL: - case ASRA: - case ASRL: - case ASUB: - case AEOR: - - case AADDD: - case AADDF: - case ASUBD: - case ASUBF: - case AMULF: - case AMULD: - case ADIVF: - if(p->reg == NREG) { - if(p->to.type == D_REG || p->to.type == D_FREG) - p->reg = p->to.reg; - if(p->reg == NREG) - print("botch %P\n", p); - } - break; - } - -/* - * flags based on 'to' field - */ - c = p->to.class; - if(c == 0) { - c = aclass(&p->to) + 1; - p->to.class = c; - } - c--; - switch(c) { - default: - print("unknown class %d %D\n", c, &p->to); - - case C_ZCON: - case C_ICON: - case C_SCON: - case C_SICON: - case C_LCON: - case C_NONE: - case C_SBRA: - case C_LBRA: - break; - - case C_PSR: - s->set.cc |= E_PSR; - break; - case C_ZOREG: - case C_SOREG: - case C_LOREG: - c = p->to.reg; - s->used.ireg |= 1<size = sz; - s->offset = regoff(&p->to); - - m = ANYMEM; - if(c == REGSB) - m = E_MEMSB; - if(c == REGSP) - m = E_MEMSP; - - if(ar) - s->used.cc |= m; - else - s->set.cc |= m; - break; - case C_SACON: - case C_LACON: - s->used.ireg |= 1<used.ireg |= 1<used.ireg |= 1<to.reg; - else - s->set.ireg |= 1<to.reg; - break; - case C_REGREG: - if(ar){ - s->used.ireg |= 1<to.reg; - s->used.ireg |= 1<to.offset; - }else{ - s->set.ireg |= 1<to.reg; - s->set.ireg |= 1<to.offset; - } - break; - case C_FREG: - /* do better -- determine double prec */ - if(ar) { - s->used.freg |= 1<to.reg; - s->used.freg |= 1<<(p->to.reg|1); - } else { - s->set.freg |= 1<to.reg; - s->set.freg |= 1<<(p->to.reg|1); - } - if(ld && p->from.type == D_REG) - p->mark |= LOAD; - break; - case C_SAUTO: - case C_LAUTO: - s->used.ireg |= 1<size = sz; - s->offset = regoff(&p->to); - - if(ar) - s->used.cc |= E_MEMSP; - else - s->set.cc |= E_MEMSP; - break; - case C_SEXT: - case C_LEXT: - s->used.ireg |= 1<size = sz; - s->offset = regoff(&p->to); - - if(ar) - s->used.cc |= E_MEMSB; - else - s->set.cc |= E_MEMSB; - break; - } - -/* - * flags based on 'from' field - */ - c = p->from.class; - if(c == 0) { - c = aclass(&p->from) + 1; - p->from.class = c; - } - c--; - switch(c) { - default: - print("unknown class %d %D\n", c, &p->from); - - case C_ZCON: - case C_ICON: - case C_SCON: - case C_SICON: - case C_LCON: - case C_NONE: - case C_SBRA: - case C_LBRA: - break; - case C_PSR: - s->used.cc |= E_PSR; - break; - case C_ZOREG: - case C_SOREG: - case C_LOREG: - c = p->from.reg; - s->used.ireg |= 1<mark |= LOAD; - s->size = sz; - s->offset = regoff(&p->from); - - m = ANYMEM; - if(c == REGSB) - m = E_MEMSB; - if(c == REGSP) - m = E_MEMSP; - - s->used.cc |= m; - break; - case C_SACON: - case C_LACON: - s->used.ireg |= 1<used.ireg |= 1<used.ireg |= 1<from.reg; - break; - case C_REGREG: - s->used.ireg |= 1<from.reg; - s->used.ireg |= 1<from.offset; - break; - case C_FREG: - /* do better -- determine double prec */ - s->used.freg |= 1<from.reg; - s->used.freg |= 1<<(p->from.reg|1); - if(ld && p->to.type == D_REG) - p->mark |= LOAD; - break; - case C_SAUTO: - case C_LAUTO: - s->used.ireg |= 1<mark |= LOAD; - if(ad) - break; - s->size = sz; - s->offset = regoff(&p->from); - - s->used.cc |= E_MEMSP; - break; - case C_SEXT: - case C_LEXT: - s->used.ireg |= 1<mark |= LOAD; - if(ad) - break; - s->size = sz; - s->offset = regoff(&p->from); - - s->used.cc |= E_MEMSB; - break; - } - - c = p->reg; - if(c != NREG) { - if(p->from.type == D_FREG || p->to.type == D_FREG) { - s->used.freg |= 1<used.freg |= 1<<(c|1); - } else - s->used.ireg |= 1<set.ireg & (sb->set.ireg|sb->used.ireg)) - return 1; - if(sb->set.ireg & sa->used.ireg) - return 1; - - if(sa->set.freg & (sb->set.freg|sb->used.freg)) - return 1; - if(sb->set.freg & sa->used.freg) - return 1; - - /* - * special case. - * loads from same address cannot pass. - * this is for hardware fifo's and the like - */ - if(sa->used.cc & sb->used.cc & E_MEM) - if(sa->p.reg == sb->p.reg) - if(regoff(&sa->p.from) == regoff(&sb->p.from)) - return 1; - - x = (sa->set.cc & (sb->set.cc|sb->used.cc)) | - (sb->set.cc & sa->used.cc); - if(x) { - /* - * allow SB and SP to pass each other. - * allow SB to pass SB iff doffsets are ok - * anything else conflicts - */ - if(x != E_MEMSP && x != E_MEMSB) - return 1; - x = sa->set.cc | sb->set.cc | - sa->used.cc | sb->used.cc; - if(x & E_MEM) - return 1; - if(offoverlap(sa, sb)) - return 1; - } - - return 0; -} - -int -offoverlap(Sch *sa, Sch *sb) -{ - - if(sa->offset < sb->offset) { - if(sa->offset+sa->size > sb->offset) - return 1; - return 0; - } - if(sb->offset+sb->size > sa->offset) - return 1; - return 0; -} - -/* - * test 2 adjacent instructions - * and find out if inserted instructions - * are desired to prevent stalls. - */ -int -conflict(Sch *sa, Sch *sb) -{ - - if(sa->set.ireg & sb->used.ireg) - return 1; - if(sa->set.freg & sb->used.freg) - return 1; - if(sa->set.cc & sb->used.cc) - return 1; - - return 0; -} - -int -compound(Prog *p) -{ - Optab *o; - - o = oplook(p); - if(o->size != 4) - return 1; - if(p->to.type == D_REG && p->to.reg == REGSB) - return 1; - return 0; -} - -void -dumpbits(Sch *s, Dep *d) -{ - int i; - - for(i=0; i<32; i++) - if(d->ireg & (1<freg & (1<cc & (1<size); - break; - case E_MEMSB: - Bprint(&bso, " SB%d", s->size); - break; - case E_MEMSP: - Bprint(&bso, " SP%d", s->size); - break; - } -} --- /sys/src/cmd/plumb/fsys.c Thu Feb 28 21:07:17 2002 +++ /sys/src/cmd/plumb/fsys.c Thu Feb 21 22:17:33 2013 @@ -10,7 +10,7 @@ enum { - Stack = 8*1024 + Stack = 16*1024 }; typedef struct Dirtab Dirtab;