This patch enables the FIFO by default on i8250 UARTs.  This is needed
for using rdb(1) at higher baudrates.  FIFO level reporting was also
corrected.

Reference: /n/sources/patch/maybe/uarti8250-fifo
Date: Sun Jul  7 02:50:19 CES 2013
Signed-off-by: sstallion@gmail.com

--- /sys/src/9/pc/uarti8250.c	Sun Jul  7 02:50:10 2013
+++ /sys/src/9/pc/uarti8250.c	Sun Jul  7 02:50:08 2013
@@ -224,25 +224,28 @@
 	 * Some UARTs require FIFOena to be set before
 	 * other bits can take effect, so set it twice.
 	 */
-	ctlr->fena = level;
 	switch(level){
-	case 0:
+	default:
+		level = 14;
+	case 14:
+		ctlr->sticky[Fcr] = FIFO14|FIFOena;
 		break;
-	case 1:
-		level = FIFO1|FIFOena;
+	case 8:
+		ctlr->sticky[Fcr] = FIFO8|FIFOena;
 		break;
 	case 4:
-		level = FIFO4|FIFOena;
+		ctlr->sticky[Fcr] = FIFO4|FIFOena;
 		break;
-	case 8:
-		level = FIFO8|FIFOena;
+	case 1:
+		ctlr->sticky[Fcr] = FIFO1|FIFOena;
 		break;
-	default:
-		level = FIFO14|FIFOena;
+	case 0:
+		ctlr->sticky[Fcr] = 0;
 		break;
 	}
-	csr8w(ctlr, Fcr, level);
-	csr8w(ctlr, Fcr, level);
+	ctlr->fena = level;
+	csr8w(ctlr, Fcr, 0);
+	csr8w(ctlr, Fcr, 0);
 	iunlock(ctlr);
 }
 
@@ -605,6 +608,7 @@
 
 	(*uart->phys->dtr)(uart, 1);
 	(*uart->phys->rts)(uart, 1);
+	(*uart->phys->fifo)(uart, 1);
 
 	/*
 	 * During startup, the i8259 interrupt controller is reset.