Add support for 82579 chip.  Tested on Intel DH61DL motherboard.

Reference: /n/sources/patch/applied/ether82579
Date: Thu Dec 13 21:42:28 CET 2012
Signed-off-by: miller@hamnavoe.com

--- /sys/src/9/pc/ether82563.c	Thu Dec 13 21:40:32 2012
+++ /sys/src/9/pc/ether82563.c	Thu Dec 13 21:40:26 2012
@@ -1,7 +1,7 @@
 /*
  * Intel Gigabit Ethernet PCI-Express Controllers.
  *	8256[36], 8257[124], 82573[ev]
- *	82575eb, 82576, 82577
+ *	82575eb, 82576, 82577, 82579
  * Pretty basic, does not use many of the chip smarts.
  * The interrupt mitigation tuning for each chip variant
  * is probably different. The reset/initialisation
@@ -59,7 +59,7 @@
 	/* Receive */
 
 	Rctl		= 0x0100,	/* Control */
-	Ert		= 0x2008,	/* Early Receive Threshold (573[EVL] only) */
+	Ert		= 0x2008,	/* Early Receive Threshold (573[EVL], 579 only) */
 	Fcrtl		= 0x2160,	/* Flow Control RX Threshold Low */
 	Fcrth		= 0x2168,	/* Flow Control Rx Threshold High */
 	Psrctl		= 0x2170,	/* Packet Split Receive Control */
@@ -427,6 +427,7 @@
 	i82575,
 	i82576,
 	i82577,
+	i82579,
 };
 
 static int rbtab[] = {
@@ -441,6 +442,7 @@
 	1514,
 	1514,
 	1514,
+	9018,
 };
 
 static char *tname[] = {
@@ -455,6 +457,7 @@
 	"i82575",
 	"i82576",
 	"i82577",
+	"i82579",
 };
 
 typedef struct Ctlr Ctlr;
@@ -995,7 +998,7 @@
 	}
 	csr32w(ctlr, Rctl, rctl);
 
-	if(ctlr->type == i82573 || ctlr->type == i82577)
+	if(ctlr->type == i82573 || ctlr->type == i82577 || ctlr->type == i82579)
 		csr32w(ctlr, Ert, 1024/8);
 
 	if(ctlr->type == i82566 || ctlr->type == i82567)
@@ -1375,7 +1378,7 @@
 	delay(10);
 
 	r = csr32r(ctlr, Ctrl);
-	if(ctlr->type == i82566 || ctlr->type == i82567)
+	if(ctlr->type == i82566 || ctlr->type == i82567 || ctlr->type == i82579)
 		r |= Phyrst;
 	csr32w(ctlr, Ctrl, Devrst | r);
 	delay(1);
@@ -1519,7 +1522,7 @@
 	f.sz = f.reg32[Bfpr];
 	r = f.sz & 0x1fff;
 	if(csr32r(c, Eec) & (1<<22))
-		++r;
+		r += c->type == i82579? 16 : 1;
 	r <<= 12;
 
 	sum = 0;
@@ -1541,7 +1544,8 @@
 
 	if(i82563detach(ctlr))
 		return -1;
-	if(ctlr->type == i82566 || ctlr->type == i82567 || ctlr->type == i82577)
+	if(ctlr->type == i82566 || ctlr->type == i82567
+	|| ctlr->type == i82577 || ctlr->type == i82579)
 		r = fload(ctlr);
 	else
 		r = eeload(ctlr);
@@ -1578,7 +1582,8 @@
 	 */
 	csr32w(ctlr, Fcal, 0x00C28001);
 	csr32w(ctlr, Fcah, 0x0100);
-	csr32w(ctlr, Fct, 0x8808);
+	if(ctlr->type != i82579)
+		csr32w(ctlr, Fct, 0x8808);
 	csr32w(ctlr, Fcttv, 0x0100);
 
 	ctlr->fcrtl = ctlr->fcrth = 0;
@@ -1648,6 +1653,10 @@
 		case 0x10ea:		/* 82577lm */
 			type = i82577;
 			break;
+		case 0x1502:		/* 82579lm */
+		case 0x1503:		/* 82579v */
+			type = i82579;
+			break;
 		}
 
 		io = p->mem[0].bar & ~0x0F;
@@ -1779,6 +1788,12 @@
 	return pnp(e, i82575);
 }
 
+static int
+i82579pnp(Ether *e)
+{
+	return pnp(e, i82579);
+}
+
 void
 ether82563link(void)
 {
@@ -1789,5 +1804,6 @@
 	addethercard("i82572", i82572pnp);
 	addethercard("i82573", i82573pnp);
 	addethercard("i82575", i82575pnp);
+	addethercard("i82579", i82579pnp);
 	addethercard("igbepcie", anypnp);
 }