clean up page sizes & add my terminal to recognized amd machines. there's no need to test for 2mb pages. if a machine can do 64-bit, it can do 2mb pages. Reference: /n/patches.lsub.org/patch/archk10clean Date: Sun Oct 28 19:30:19 CET 2012 Signed-off-by: quanstro@quanstro.net --- /sys/src/nix/k10/archk10.c Tue Jul 3 10:42:54 2012 +++ /sys/src/nix/k10/archk10.c Sun Oct 28 18:35:03 2012 @@ -127,6 +127,7 @@ return 0; hz = (800 + 200*((msr>>1) & 0x1f)) * 1000000ll; break; + case 0x00100f40: /* phenom ii x4 */ case 0x00100f90: /* K10 */ case 0x00000620: /* QEMU64 */ msr = rdmsr(0xc0010064); @@ -137,8 +138,7 @@ DBG("cpuidhz: %#llux hz %lld\n", msr, hz); } else - return 0; - + hz = 0; return hz; } @@ -162,6 +162,18 @@ return i8254hz(info); } +static void +addmachpgsz(int bits) +{ + int i; + + i = m->npgsz; + m->pgszlg2[i] = bits; + m->pgszmask[i] = (1<pgsz[i] = 1<npgsz++; +} + int archmmu(void) { @@ -170,46 +182,16 @@ /* * Should the check for m->machno != 0 be here * or in the caller (mmuinit)? - * - * To do here: - * check and enable Pse; - * Pge; Nxe. */ - /* - * How many page sizes are there? - * Always have 4*KiB, but need to check - * configured correctly. - */ - assert(PGSZ == 4*KiB); - - m->pgszlg2[0] = 12; - m->pgszmask[0] = (1<<12)-1; - m->pgsz[0] = 1<<12; - m->npgsz = 1; - if(m->ncpuinfos == 0 && cpuidinit() == 0) - return 1; - - /* - * Check the Pse bit in function 1 DX for 2*MiB support; - * if false, only 4*KiB is available. - */ - if(!(m->cpuinfo[1][3] & 0x00000008)) - return 1; - m->pgszlg2[1] = 21; - m->pgszmask[1] = (1<<21)-1; - m->pgsz[1] = 1<<21; - m->npgsz = 2; + addmachpgsz(12); + addmachpgsz(21); /* * Check the Page1GB bit in function 0x80000001 DX for 1*GiB support. */ - if(cpuidinfo(0x80000001, 0, info) && (info[3] & 0x04000000)){ - m->pgszlg2[2] = 30; - m->pgszmask[2] = (1<<30)-1; - m->pgsz[2] = 1<<30; - m->npgsz = 3; - } + if(cpuid(0x80000001, 0, info) && (info[3] & 0x04000000)) + addmachpgsz(30); return m->npgsz; }