nits Reference: /n/patches.lsub.org/patch/mmunits Date: Sun Oct 28 18:50:34 CET 2012 Signed-off-by: quanstro@quanstro.net --- /sys/src/nix/k10/mmu.c Thu Sep 13 12:34:14 2012 +++ /sys/src/nix/k10/mmu.c Sun Oct 28 17:56:31 2012 @@ -84,7 +84,7 @@ } void -dumpptepg(int lvl, uintptr pa) +dumpptepg(int lvl, uintmem pa) { PTE *pte; int tab, i; @@ -163,7 +163,7 @@ unlock(&mmuptpfreelist); if(page->ref++ != 0) - panic("mmuptpalloc ref\n"); + panic("mmuptpalloc ref"); page->prev = page->next = nil; memset(UINT2PTR(page->va), 0, PTSZ); @@ -240,7 +240,7 @@ for(page = proc->mmuptp[0]; page != nil; page = next){ next = page->next; if(--page->ref) - panic("mmurelease: page->ref %d\n", page->ref); + panic("mmurelease: page->ref %d", page->ref); lock(&mmuptpfreelist); page->next = mmuptpfreelist.next; mmuptpfreelist.next = page; @@ -355,7 +355,7 @@ flags = 0; if(attr & ~(PTEVALID|PTEWRITE|PTERONLY|PTEUNCACHED)) - panic("mmuput: wrong attr bits: %#ux\n", attr); + panic("mmuput: wrong attr bits: %#ux", attr); if(attr&PTEVALID) flags |= PteP; if(attr&PTEWRITE) @@ -394,7 +394,7 @@ assert(pg->pgszi >= 0); pgsz = m->pgsz[pg->pgszi]; if(pa & (pgsz-1)) - panic("mmuput: pa offset non zero: %#ullx\n", pa); + panic("mmuput: pa offset non zero: %#P", pa); pa |= pteflags(attr); pl = splhi(); @@ -417,7 +417,7 @@ for(page = up->mmuptp[lvl]; page != nil; page = page->next) if(page->prev == prev && page->daddr == x){ if(*pte == 0){ - print("mmu: jmk and nemo had fun\n"); + print("mmu: parent pte 0 lvl %d va %#p\n", lvl, va); *pte = PPN(page->pa)|PteU|PteRW|PteP; } break; @@ -442,7 +442,7 @@ ppn = PPN(*pte); if(ppn == 0) - panic("mmuput: ppn=0 l%d pte %#p = %#P\n", lvl, pte, *pte); + panic("mmuput: ppn=0 l%d pte %#p = %#P", lvl, pte, *pte); pte = UINT2PTR(KADDR(ppn)); pte += x; @@ -634,7 +634,7 @@ uintptr va; usize o, sz; - DBG("vmap(%#p, %lud) pc=%#p\n", pa, size, getcallerpc(&pa)); + DBG("vmap(%#P, %lud) pc=%#p\n", pa, size, getcallerpc(&pa)); if(m->machno != 0) panic("vmap"); @@ -675,7 +675,7 @@ } iunlock(&vmaplock); - DBG("vmap(%#p, %lud) => %#p\n", pa+o, size, va+o); + DBG("vmap(%#P, %lud) => %#p\n", pa+o, size, va+o); return UINT2PTR(va + o); } @@ -711,7 +711,6 @@ int l; uintmem pa; PTE *pte; - Mpl pl; pl = splhi(); @@ -761,7 +760,7 @@ mask = PGLSZ(l)-1; pa = (*pte & ~mask) + (va & mask); - DBG("physaddr: l %d va %#p pa %#llux\n", l, va, pa); + DBG("physaddr: l %d va %#p pa %#P\n", l, va, pa); return pa; } @@ -771,12 +770,12 @@ static void nxeon(void) { - uint idres[4]; + u32int idres[4]; - /* on intel64, cpuid 0x8::1 DX bit 20 means "Nxe bit in Efer allowed" */ - cpuid(0x80000001, 0, idres); - if (idres[3] & (1<<20)) - wrmsr(Efer, rdmsr(Efer) | Nxe); + /* on intel64, cpuid 0x8::1 DX bit 20 means "Nxe bit in Efer allowed" */ + cpuid(0x80000001, 0, idres); + if (idres[3] & (1<<20)) + wrmsr(Efer, rdmsr(Efer) | Nxe); } void @@ -834,7 +833,7 @@ sz = ROUNDUP(o, 4*MiB) - o; pa = asmalloc(0, sz, 1, 0); if(pa != o) - panic("mmuinit: pa %#llux memstart %#llux\n", pa, o); + panic("mmuinit: pa %#llux memstart %#llux", pa, o); sys->pmstart += sz; sys->vmstart = KSEG0;