# HG changeset patch # User David du Colombier <0intro@gmail.com> # Date 1331547688 -3600 # Node ID 6d33694b7cf80b47892db0448d94035df9b337d9 # Parent e9319d6e603007868d033df39d561d7ab7d72518 nix: sync with plan 9 R=nixiedev, quanstro, nemo CC=nix-dev http://codereview.appspot.com/5798048 Committer: Francisco J Ballesteros diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/9/kw/usbehci.h --- a/sys/src/9/kw/usbehci.h Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/9/kw/usbehci.h Mon Mar 12 11:21:28 2012 +0100 @@ -9,9 +9,7 @@ #define ddeprint if(ehcidebug>1 || ep->debug>1)print typedef struct Ctlr Ctlr; -typedef struct Ecapio Ecapio; typedef struct Eopio Eopio; -typedef struct Edbgio Edbgio; typedef struct Isoio Isoio; typedef struct Poll Poll; typedef struct Qh Qh; @@ -26,138 +24,6 @@ #pragma incomplete Qh; #pragma incomplete Qtree; -/* - * EHCI interface registers and bits - */ -enum -{ - Cnports = 0xF, /* nport bits in Ecapio parms. */ - Cdbgportshift = 20, /* debug port in Ecapio parms. */ - Cdbgportmask = 0xF, - - /* Ecapio->capparms bits */ - C64 = 1<<0, /* 64-bits */ - Ceecpshift = 8, /* extended capabilities ptr. */ - Ceecpmask = (1<<8) - 1, - - Clegacy = 1, /* legacy support cap. id */ - CLbiossem = 2, /* legacy cap. bios sem. */ - CLossem = 3, /* legacy cap. os sem */ - - /* typed links */ - Lterm = 1, - Litd = 0<<1, - Lqh = 1<<1, - Lsitd = 2<<1, - Lfstn = 3<<1, /* we don't use these */ - - /* Cmd reg. */ - Cstop = 0x00000, /* stop running */ - Crun = 0x00001, /* start operation */ - Chcreset = 0x00002, /* host controller reset */ - Cflsmask = 0x0000C, /* frame list size bits */ - Cfls1024 = 0x00000, /* frame list size 1024 */ - Cfls512 = 0x00004, /* frame list size 512 frames */ - Cfls256 = 0x00008, /* frame list size 256 frames */ - Cpse = 0x00010, /* periodic sched. enable */ - Case = 0x00020, /* async sched. enable */ - Ciasync = 0x00040, /* interrupt on async advance doorbell */ - Citc1 = 0x10000, /* interrupt threshold ctl. 1 µframe */ - Citc4 = 0x40000, /* same. 2 µframes */ - /* ... */ - Citc8 = 0x80000, /* same. 8 µframes (can go up to 64) */ - - /* Sts reg. */ - Sasyncss = 0x08000, /* aync schedule status */ - Speriodss = 0x04000, /* periodic schedule status */ - Srecl = 0x02000, /* reclamnation (empty async sched.) */ - Shalted = 0x01000, /* h.c. is halted */ - Sasync = 0x00020, /* interrupt on async advance */ - Sherr = 0x00010, /* host system error */ - Sfrroll = 0x00008, /* frame list roll over */ - Sportchg = 0x00004, /* port change detect */ - Serrintr = 0x00002, /* error interrupt */ - Sintr = 0x00001, /* interrupt */ - Sintrs = 0x0003F, /* interrupts status */ - - /* Intr reg. */ - Iusb = 0x01, /* intr. on usb */ - Ierr = 0x02, /* intr. on usb error */ - Iportchg = 0x04, /* intr. on port change */ - Ifrroll = 0x08, /* intr. on frlist roll over */ - Ihcerr = 0x10, /* intr. on host error */ - Iasync = 0x20, /* intr. on async advance enable */ - Iall = 0x3F, /* all interrupts */ - - /* Config reg. */ - Callmine = 1, /* route all ports to us */ - - /* Portsc reg. */ - Pspresent = 0x00000001, /* device present */ - Psstatuschg = 0x00000002, /* Pspresent changed */ - Psenable = 0x00000004, /* device enabled */ - Pschange = 0x00000008, /* Psenable changed */ - Psresume = 0x00000040, /* resume detected */ - Pssuspend = 0x00000080, /* port suspended */ - Psreset = 0x00000100, /* port reset */ - Pspower = 0x00001000, /* port power on */ - Psowner = 0x00002000, /* port owned by companion */ - Pslinemask = 0x00000C00, /* line status bits */ - Pslow = 0x00000400, /* low speed device */ - - /* Debug port csw reg. */ - Cowner = 0x40000000, /* port owned by ehci */ - Cenable = 0x10000000, /* debug port enabled */ - Cdone = 0x00010000, /* request is done */ - Cbusy = 0x00000400, /* port in use by a driver */ - Cerrmask= 0x00000380, /* error code bits */ - Chwerr = 0x00000100, /* hardware error */ - Cterr = 0x00000080, /* transaction error */ - Cfailed = 0x00000040, /* transaction did fail */ - Cgo = 0x00000020, /* execute the transaction */ - Cwrite = 0x00000010, /* request is a write */ - Clen = 0x0000000F, /* data len */ - - /* Debug port pid reg. */ - Prpidshift = 16, /* received pid */ - Prpidmask = 0xFF, - Pspidshift = 8, /* sent pid */ - Pspidmask = 0xFF, - Ptokshift = 0, /* token pid */ - Ptokmask = 0xFF, - - Ptoggle = 0x00008800, /* to update toggles */ - Ptogglemask = 0x0000FF00, - - /* Debug port addr reg. */ - Adevshift = 8, /* device address */ - Adevmask = 0x7F, - Aepshift = 0, /* endpoint number */ - Aepmask = 0xF, -}; - -/* - * Capability registers (hw) - */ -struct Ecapio -{ - ulong cap; /* 00 controller capability register */ - ulong parms; /* 04 structural parameters register */ - ulong capparms; /* 08 capability parameters */ - ulong portroute; /* 0c not on the CS5536 */ -}; - -/* - * Debug port registers (hw) - */ -struct Edbgio -{ - ulong csw; /* control and status */ - ulong pid; /* USB pid */ - uchar data[8]; /* data buffer */ - ulong addr; /* device and endpoint addresses */ -}; - struct Poll { Lock; @@ -193,10 +59,6 @@ }; /* - * Kirkwood-specific stuff - */ - -/* * Operational registers (hw) */ struct Eopio diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/9/kw/usbehcikw.c --- a/sys/src/9/kw/usbehcikw.c Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/9/kw/usbehcikw.c Mon Mar 12 11:21:28 2012 +0100 @@ -12,6 +12,7 @@ #include "io.h" #include "../port/error.h" #include "../port/usb.h" +#include "../port/portusbehci.h" #include "usbehci.h" //#include "uncached.h" @@ -159,7 +160,8 @@ } /* requesting more interrupts per µframe may miss interrupts */ - opio->cmd |= Citc8; /* 1 intr. per ms */ + opio->cmd &= ~Citcmask; + opio->cmd |= 1 << Citcshift; /* max of 1 intr. per 125 µs */ switch(opio->cmd & Cflsmask){ case Cfls1024: ctlr->nframes = 1024; diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/9/omap/archomap.c --- a/sys/src/9/omap/archomap.c Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/9/omap/archomap.c Mon Mar 12 11:21:28 2012 +0100 @@ -18,6 +18,7 @@ #include "etherif.h" #include "../port/flashif.h" #include "../port/usb.h" +#include "../port/portusbehci.h" #include "usbehci.h" #define FREQSEL(x) ((x) << 4) diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/9/omap/usbehci.h --- a/sys/src/9/omap/usbehci.h Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/9/omap/usbehci.h Mon Mar 12 11:21:28 2012 +0100 @@ -9,157 +9,19 @@ #define ddeprint if(ehcidebug>1 || ep->debug>1)print typedef struct Ctlr Ctlr; -typedef struct Ecapio Ecapio; typedef struct Eopio Eopio; -typedef struct Edbgio Edbgio; typedef struct Isoio Isoio; typedef struct Poll Poll; typedef struct Qh Qh; typedef struct Qtree Qtree; #pragma incomplete Ctlr; -#pragma incomplete Ecapio; #pragma incomplete Eopio; -#pragma incomplete Edbgio; #pragma incomplete Isoio; #pragma incomplete Poll; #pragma incomplete Qh; #pragma incomplete Qtree; - -/* - * EHCI interface registers and bits - */ -enum -{ - Cnports = 0xF, /* nport bits in Ecapio parms. */ - Cdbgportshift = 20, /* debug port in Ecapio parms. */ - Cdbgportmask = 0xF, - - /* Ecapio->capparms bits */ - C64 = 1<<0, /* 64-bits */ - Ceecpshift = 8, /* extended capabilities ptr. */ - Ceecpmask = (1<<8) - 1, - - Clegacy = 1, /* legacy support cap. id */ - CLbiossem = 2, /* legacy cap. bios sem. */ - CLossem = 3, /* legacy cap. os sem */ - CLcontrol = 4, /* legacy support control & status */ - - /* typed links */ - Lterm = 1, - Litd = 0<<1, - Lqh = 1<<1, - Lsitd = 2<<1, - Lfstn = 3<<1, /* we don't use these */ - - /* Cmd reg. */ - Cstop = 0x00000, /* stop running */ - Crun = 0x00001, /* start operation */ - Chcreset = 0x00002, /* host controller reset */ - Cflsmask = 0x0000C, /* frame list size bits */ - Cfls1024 = 0x00000, /* frame list size 1024 */ - Cfls512 = 0x00004, /* frame list size 512 frames */ - Cfls256 = 0x00008, /* frame list size 256 frames */ - Cpse = 0x00010, /* periodic sched. enable */ - Case = 0x00020, /* async sched. enable */ - Ciasync = 0x00040, /* interrupt on async advance doorbell */ - Citc1 = 0x10000, /* interrupt threshold ctl. 1 µframe */ - Citc4 = 0x40000, /* same. 2 µframes */ - /* ... */ - Citc8 = 0x80000, /* same. 8 µframes (can go up to 64) */ - - /* Sts reg. */ - Sasyncss = 0x08000, /* aync schedule status */ - Speriodss = 0x04000, /* periodic schedule status */ - Srecl = 0x02000, /* reclamnation (empty async sched.) */ - Shalted = 0x01000, /* h.c. is halted */ - Sasync = 0x00020, /* interrupt on async advance */ - Sherr = 0x00010, /* host system error */ - Sfrroll = 0x00008, /* frame list roll over */ - Sportchg = 0x00004, /* port change detect */ - Serrintr = 0x00002, /* error interrupt */ - Sintr = 0x00001, /* interrupt */ - Sintrs = 0x0003F, /* interrupts status */ - - /* Intr reg. */ - Iusb = 0x01, /* intr. on usb */ - Ierr = 0x02, /* intr. on usb error */ - Iportchg = 0x04, /* intr. on port change */ - Ifrroll = 0x08, /* intr. on frlist roll over */ - Ihcerr = 0x10, /* intr. on host error */ - Iasync = 0x20, /* intr. on async advance enable */ - Iall = 0x3F, /* all interrupts */ - - /* Config reg. */ - Callmine = 1, /* route all ports to us */ - - /* Portsc reg. */ - Pspresent = 0x00000001, /* device present */ - Psstatuschg = 0x00000002, /* Pspresent changed */ - Psenable = 0x00000004, /* device enabled */ - Pschange = 0x00000008, /* Psenable changed */ - Psresume = 0x00000040, /* resume detected */ - Pssuspend = 0x00000080, /* port suspended */ - Psreset = 0x00000100, /* port reset */ - Pspower = 0x00001000, /* port power on */ - Psowner = 0x00002000, /* port owned by companion */ - Pslinemask = 0x00000C00, /* line status bits */ - Pslow = 0x00000400, /* low speed device */ - - /* Debug port csw reg. */ - Cowner = 0x40000000, /* port owned by ehci */ - Cenable = 0x10000000, /* debug port enabled */ - Cdone = 0x00010000, /* request is done */ - Cbusy = 0x00000400, /* port in use by a driver */ - Cerrmask= 0x00000380, /* error code bits */ - Chwerr = 0x00000100, /* hardware error */ - Cterr = 0x00000080, /* transaction error */ - Cfailed = 0x00000040, /* transaction did fail */ - Cgo = 0x00000020, /* execute the transaction */ - Cwrite = 0x00000010, /* request is a write */ - Clen = 0x0000000F, /* data len */ - - /* Debug port pid reg. */ - Prpidshift = 16, /* received pid */ - Prpidmask = 0xFF, - Pspidshift = 8, /* sent pid */ - Pspidmask = 0xFF, - Ptokshift = 0, /* token pid */ - Ptokmask = 0xFF, - - Ptoggle = 0x00008800, /* to update toggles */ - Ptogglemask = 0x0000FF00, - - /* Debug port addr reg. */ - Adevshift = 8, /* device address */ - Adevmask = 0x7F, - Aepshift = 0, /* endpoint number */ - Aepmask = 0xF, -}; - -/* - * Capability registers (hw) - */ -struct Ecapio -{ - ulong cap; /* 00 controller capability register */ - ulong parms; /* 04 structural parameters register */ - ulong capparms; /* 08 capability parameters */ - ulong portroute; /* 0c not on the CS5536 */ -}; - -/* - * Debug port registers (hw) - */ -struct Edbgio -{ - ulong csw; /* control and status */ - ulong pid; /* USB pid */ - uchar data[8]; /* data buffer */ - ulong addr; /* device and endpoint addresses */ -}; - struct Poll { Lock; @@ -195,15 +57,6 @@ }; /* - * OMAP3-specific stuff - */ - -enum { - /* hostconfig bits */ - P1ulpi_bypass = 1<<0, /* utmi if set; else ulpi */ -}; - -/* * Operational registers (hw) */ struct Eopio @@ -236,6 +89,11 @@ ulong debug_csr; }; +enum { + /* hostconfig bits */ + P1ulpi_bypass = 1<<0, /* utmi if set; else ulpi */ +}; + extern Ecapio *ehcidebugcapio; extern int ehcidebugport; diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/9/omap/usbehciomap.c --- a/sys/src/9/omap/usbehciomap.c Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/9/omap/usbehciomap.c Mon Mar 12 11:21:28 2012 +0100 @@ -12,6 +12,7 @@ #include "io.h" #include "../port/error.h" #include "../port/usb.h" +#include "../port/portusbehci.h" #include "usbehci.h" static Ctlr* ctlrs[Nhcis]; @@ -53,7 +54,8 @@ } /* requesting more interrupts per µframe may miss interrupts */ - opio->cmd |= Citc8; /* 1 intr. per ms */ + opio->cmd &= ~Citcmask; + opio->cmd |= 1 << Citcshift; /* max of 1 intr. per 125 µs */ coherence(); switch(opio->cmd & Cflsmask){ case Cfls1024: diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/9/pc/usbehcipc.c --- a/sys/src/9/pc/usbehcipc.c Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/9/pc/usbehcipc.c Mon Mar 12 11:21:28 2012 +0100 @@ -12,6 +12,7 @@ #include "io.h" #include "../port/error.h" #include "../port/usb.h" +#include "../port/portusbehci.h" #include "usbehci.h" static Ctlr* ctlrs[Nhcis]; @@ -92,7 +93,8 @@ } /* requesting more interrupts per µframe may miss interrupts */ - opio->cmd |= Citc8; /* 1 intr. per ms */ + opio->cmd &= ~Citcmask; + opio->cmd |= 1 << Citcshift; /* max of 1 intr. per 125 µs */ coherence(); switch(opio->cmd & Cflsmask){ case Cfls1024: diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/9/port/portusbehci.h --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/sys/src/9/port/portusbehci.h Mon Mar 12 11:21:28 2012 +0100 @@ -0,0 +1,144 @@ +/* + * ECHI portable hardware definitions + */ + +typedef struct Ecapio Ecapio; +typedef struct Edbgio Edbgio; + +#pragma incomplete Ecapio; +#pragma incomplete Edbgio; + +/* + * EHCI interface registers and bits + */ +enum +{ + /* Ecapio->parms reg. */ + Cnports = 0xF, /* nport bits */ + Cdbgportshift = 20, /* debug port */ + Cdbgportmask = 0xF, + + /* Ecapio->capparms bits */ + C64 = 1<<0, /* 64-bits */ + Cpfl = 1<<1, /* program'ble frame list: can be <1024 */ + Casp = 1<<2, /* asynch. sched. park */ + Ceecpshift = 8, /* extended capabilities ptr. */ + Ceecpmask = (1<<8) - 1, + + Clegacy = 1, /* legacy support cap. id */ + CLbiossem = 2, /* legacy cap. bios sem. */ + CLossem = 3, /* legacy cap. os sem */ + CLcontrol = 4, /* legacy support control & status */ + + /* typed links */ + Lterm = 1, + Litd = 0<<1, + Lqh = 1<<1, + Lsitd = 2<<1, + Lfstn = 3<<1, /* we don't use these */ + + /* Cmd reg. */ + Cstop = 0x00000, /* stop running */ + Crun = 0x00001, /* start operation */ + Chcreset = 0x00002, /* host controller reset */ + Cflsmask = 0x0000C, /* frame list size bits */ + Cfls1024 = 0x00000, /* frame list size 1024 */ + Cfls512 = 0x00004, /* frame list size 512 frames */ + Cfls256 = 0x00008, /* frame list size 256 frames */ + Cpse = 0x00010, /* periodic sched. enable */ + Case = 0x00020, /* async sched. enable */ + Ciasync = 0x00040, /* interrupt on async advance doorbell */ + /* interrupt threshold ctl. in µframes (1-32 in powers of 2) */ + Citcshift = 16, + Citcmask = 0xff << Citcshift, + + /* Sts reg. */ + Sasyncss = 0x08000, /* aync schedule status */ + Speriodss = 0x04000, /* periodic schedule status */ + Srecl = 0x02000, /* reclamnation (empty async sched.) */ + Shalted = 0x01000, /* h.c. is halted */ + Sasync = 0x00020, /* interrupt on async advance */ + Sherr = 0x00010, /* host system error */ + Sfrroll = 0x00008, /* frame list roll over */ + Sportchg = 0x00004, /* port change detect */ + Serrintr = 0x00002, /* error interrupt */ + Sintr = 0x00001, /* interrupt */ + Sintrs = 0x0003F, /* interrupts status */ + + /* Intr reg. */ + Iusb = 0x01, /* intr. on usb */ + Ierr = 0x02, /* intr. on usb error */ + Iportchg = 0x04, /* intr. on port change */ + Ifrroll = 0x08, /* intr. on frlist roll over */ + Ihcerr = 0x10, /* intr. on host error */ + Iasync = 0x20, /* intr. on async advance enable */ + Iall = 0x3F, /* all interrupts */ + + /* Config reg. */ + Callmine = 1, /* route all ports to us */ + + /* Portsc reg. */ + Pspresent = 0x00000001, /* device present */ + Psstatuschg = 0x00000002, /* Pspresent changed */ + Psenable = 0x00000004, /* device enabled */ + Pschange = 0x00000008, /* Psenable changed */ + Psresume = 0x00000040, /* resume detected */ + Pssuspend = 0x00000080, /* port suspended */ + Psreset = 0x00000100, /* port reset */ + Pspower = 0x00001000, /* port power on */ + Psowner = 0x00002000, /* port owned by companion */ + Pslinemask = 0x00000C00, /* line status bits */ + Pslow = 0x00000400, /* low speed device */ + + /* Debug port csw reg. */ + Cowner = 0x40000000, /* port owned by ehci */ + Cenable = 0x10000000, /* debug port enabled */ + Cdone = 0x00010000, /* request is done */ + Cbusy = 0x00000400, /* port in use by a driver */ + Cerrmask= 0x00000380, /* error code bits */ + Chwerr = 0x00000100, /* hardware error */ + Cterr = 0x00000080, /* transaction error */ + Cfailed = 0x00000040, /* transaction did fail */ + Cgo = 0x00000020, /* execute the transaction */ + Cwrite = 0x00000010, /* request is a write */ + Clen = 0x0000000F, /* data len */ + + /* Debug port pid reg. */ + Prpidshift = 16, /* received pid */ + Prpidmask = 0xFF, + Pspidshift = 8, /* sent pid */ + Pspidmask = 0xFF, + Ptokshift = 0, /* token pid */ + Ptokmask = 0xFF, + + Ptoggle = 0x00008800, /* to update toggles */ + Ptogglemask = 0x0000FF00, + + /* Debug port addr reg. */ + Adevshift = 8, /* device address */ + Adevmask = 0x7F, + Aepshift = 0, /* endpoint number */ + Aepmask = 0xF, +}; + +/* + * Capability registers (hw) + */ +struct Ecapio +{ + ulong cap; /* 00 controller capability register */ + ulong parms; /* 04 structural parameters register */ + ulong capparms; /* 08 capability parameters */ + ulong portroute; /* 0c not on the CS5536 */ +}; + +/* + * Debug port registers (hw) + */ +struct Edbgio +{ + ulong csw; /* control and status */ + ulong pid; /* USB pid */ + uchar data[8]; /* data buffer */ + ulong addr; /* device and endpoint addresses */ +}; diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/9/port/usbehci.c --- a/sys/src/9/port/usbehci.c Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/9/port/usbehci.c Mon Mar 12 11:21:28 2012 +0100 @@ -19,6 +19,7 @@ #include "io.h" #include "../port/error.h" #include "../port/usb.h" +#include "../port/portusbehci.h" #include "usbehci.h" #include "uncached.h" diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/ape/lib/ap/plan9/_buf.c --- a/sys/src/ape/lib/ap/plan9/_buf.c Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/ape/lib/ap/plan9/_buf.c Mon Mar 12 11:21:28 2012 +0100 @@ -469,4 +469,5 @@ if(_finishing) _finish(0, 0); _NOTED(1); + return 0; } diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/cmd/cc/cc.h --- a/sys/src/cmd/cc/cc.h Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/cmd/cc/cc.h Mon Mar 12 11:21:28 2012 +0100 @@ -30,7 +30,7 @@ #define NTERM 10 #define MAXALIGN 7 -#define SIGN(n) ((vlong)1<<(n-1)) +#define SIGN(n) (1ULL<<(n-1)) #define MASK(n) (SIGN(n)|(SIGN(n)-1)) #define BITS 5 diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/libmach/elf.h --- a/sys/src/libmach/elf.h Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/libmach/elf.h Mon Mar 12 11:21:28 2012 +0100 @@ -1,5 +1,5 @@ /* - * Definitions needed for accessing Irix ELF headers + * Definitions needed for accessing ELF headers */ typedef struct { uchar ident[16]; /* ident bytes */ @@ -19,21 +19,21 @@ } Ehdr; typedef struct { - uchar ident[16]; /* ident bytes */ - ushort type; /* file type */ - ushort machine; /* target machine */ - int version; /* file version */ - uvlong elfentry; /* start address */ - uvlong phoff; /* phdr file offset */ - uvlong shoff; /* shdr file offset */ - int flags; /* file flags */ - ushort ehsize; /* sizeof ehdr */ - ushort phentsize; /* sizeof phdr */ - ushort phnum; /* number phdrs */ - ushort shentsize; /* sizeof shdr */ - ushort shnum; /* number shdrs */ - ushort shstrndx; /* shdr string index */ -} Ehdr64; + u8int ident[16]; /* ident bytes */ + u16int type; /* file type */ + u16int machine; /* target machine */ + u32int version; /* file version */ + u64int elfentry; /* start address */ + u64int phoff; /* phdr file offset */ + u64int shoff; /* shdr file offset */ + u32int flags; /* file flags */ + u16int ehsize; /* sizeof ehdr */ + u16int phentsize; /* sizeof phdr */ + u16int phnum; /* number phdrs */ + u16int shentsize; /* sizeof shdr */ + u16int shnum; /* number shdrs */ + u16int shstrndx; /* shdr string index */ +} E64hdr; typedef struct { int type; /* entry type */ @@ -121,7 +121,8 @@ S370 = 9, /* Amdhal */ SPARC64 = 18, /* Sun SPARC v9 */ POWER = 20, /* PowerPC */ - ARM = 40, /* ARM */ + POWER64 = 21, /* PowerPC64 */ + ARM = 40, /* ARM */ AMD64 = 62, /* Amd64 */ NO_VERSION = 0, /* version, ident[VERSION] */ diff -r e9319d6e6030 -r 6d33694b7cf8 sys/src/libmach/executable.c --- a/sys/src/libmach/executable.c Fri Mar 09 15:03:51 2012 +0100 +++ b/sys/src/libmach/executable.c Mon Mar 12 11:21:28 2012 +0100 @@ -17,7 +17,7 @@ uvlong hdr[1]; }; Ehdr; /* elf.h */ - Ehdr64; /* elf.h */ + E64hdr; /* elf.h */ struct mipsexec; /* bootexec.h */ struct mips4kexec; /* bootexec.h */ struct sparcexec; /* bootexec.h */ @@ -214,7 +214,7 @@ FNONE, 0, &mamd64, - sizeof(Ehdr64), + sizeof(E64hdr), nil, elf64dotout }, { ELF_MAG, /* any elf32 */ @@ -691,7 +691,7 @@ uvlong (*swav)(uvlong); ulong (*swal)(ulong); ushort (*swab)(ushort); - Ehdr64 *ep; + E64hdr *ep; Phdr64 *ph; int i, it, id, is, phsz, memsz;