add verbose output of msi-x structure Reference: /n/atom/patch/applied2013/pciverbmcix Date: Fri Dec 27 11:16:54 CET 2013 Signed-off-by: quanstro@quanstro.net --- /sys/src/cmd/pci/pci.c Fri Dec 27 11:16:45 2013 +++ /sys/src/cmd/pci/pci.c Fri Dec 27 11:16:46 2013 @@ -63,6 +63,8 @@ char *s, *si; uint dcr, cap, i, j; + Bprint(&o, "\t" "pcie\n"); + cap = pcicfgr16(p, off + PciePCP); i = cap>>4 & 0xf; s = "unknown device type"; @@ -71,10 +73,10 @@ si = ""; if(i == 4 || i == 6) si = cap&1<<8? "; slot": "; integrated"; - Bprint(&o, " pcie type: %s%s; msgs %d\n", s, si, cap>>9 & 0x3f); + Bprint(&o, "\t\tpcie type: %s%s; msgs %d\n", s, si, cap>>9 & 0x3f); dcr = pcicfgr16(p, off + PcieDCR); - Bprint(&o, " device control: %.4ux; ", dcr); + Bprint(&o, "\t\tdevice control: %.4ux; ", dcr); for(i = 0; i < nelem(dcrtab); i++){ if(dcr & dcrtab[i].v) Bprint(&o, "%s ", dcrtab[i].s); @@ -85,10 +87,10 @@ i = cap & 7; for(j = 128; i != 0; i--) j *= 2; - Bprint(&o, " max payload: %d bytes; pp %d\n", j, i>>3 & 3); + Bprint(&o, "\t\t" "max payload: %d bytes; pp %d\n", j, i>>3 & 3); - linkdump(p, off + PcieLCA, " link cap"); - linkdump(p, off + PcieLSR, " link stat"); + linkdump(p, off + PcieLCA, "\t\t" "link cap"); + linkdump(p, off + PcieLSR, "\t\t" "link stat"); cap = pcicfgr32(p, off + PcieSCA); i = pcicfgr16(p, off + PcieSSR); @@ -96,7 +98,19 @@ if(i & 1<<6) s = "present"; j = pcicfgr32(p, off + PcieLCA); - Bprint(&o, " slot number: %d; port %d; %s\n", cap>>19, j>>24, s); + Bprint(&o, "\t\t" "slot number: %d; port %d; %s\n", cap>>19, j>>24, s); +} + +void +msixdump(Pcidev *p, int off) +{ + u32int u; + + Bprint(&o, "\t" "msi-x\n"); + u = pcicfgr32(p, off + 0); + Bprint(&o, "\t\t" "table: offset %.8ux; bar %d\n", u&~7, u&7); + u = pcicfgr32(p, off + 4); + Bprint(&o, "\t\t" "pba: offset %.8ux; bar %d\n", u&~7, u&7); } typedef struct Captab Captab; @@ -123,7 +137,7 @@ 0x0e, "agp8", nil, 0x0f, "secure", nil, 0x10, "pcie", pciedump, -0x11, "msi-x", nil, +0x11, "msi-x", msixdump, 0x12, "satad/i", nil, 0x13, "advfeat", nil, };