bars are uintmem. masks must be uintmem. not sure why the compiler didn't warn. Reference: /n/atom/patch/applied2013/fsamd64barsz Date: Tue Sep 17 15:01:40 CES 2013 Signed-off-by: quanstro@quanstro.net --- /sys/src/fs/amd64/ether82563.c Tue Sep 17 14:57:26 2013 +++ /sys/src/fs/amd64/ether82563.c Tue Sep 17 14:57:27 2013 @@ -971,6 +971,7 @@ ctlr->rdfree++; } if(i != 0){ + sfence(); ctlr->rdt = rdt; csr32w(ctlr, Rdt, rdt); } @@ -1026,7 +1027,7 @@ if(cttab[ctlr->type].flag & F75) csr32w(ctlr, Rxdctl, 1<pcidev->mem[1].bar & ~0x0f; + io = c->pcidev->mem[1].bar & ~(uintmem)0x0f; f.reg = vmap(io, c->pcidev->mem[1].size); if(f.reg == nil) return -1; @@ -1649,7 +1650,7 @@ c->type = type; c->pcidev = p; c->rbsz = cttab[type].mtu; - c->port = p->mem[0].bar & ~0x0F; + c->port = p->mem[0].bar & ~(uintmem)0xf; *cc = c; cc = &c->next; } @@ -1715,6 +1716,7 @@ } } + snprint(edev->type, sizeof edev->type, "%s", cname(ctlr)); /* gimpy */ edev->ctlr = ctlr; edev->port = ctlr->port; edev->irq = ctlr->pcidev->intl; --- /sys/src/fs/amd64/ether82598.c Tue Sep 17 14:57:29 2013 +++ /sys/src/fs/amd64/ether82598.c Tue Sep 17 14:57:30 2013 @@ -515,7 +515,7 @@ } if(i){ c->tdt = tdt; - coherence(); + sfence(); c->reg[Tdt] = tdt; } qunlock(&c->tlock); @@ -605,7 +605,7 @@ } nobufs: if(i){ - coherence(); + sfence(); c->reg[Rdt] = c->rdt = rdt; } if(rdt == rdh) @@ -681,7 +681,7 @@ /* not cleared by reset; kill it manually. */ for(i = 1; i<16; i++) - c->reg[Rah] &= ~(1<<31); + c->reg[Rah + 2*i] &= ~(1<<31); for(i = 0; i<128; i++) c->reg[Mta+i] = 0; for(i = 1; i<640; i++) @@ -701,7 +701,7 @@ { c->reg[Eerd] = EEstart|i<<2; while((c->reg[Eerd]&EEdone) == 0) - ; + pause(); return c->reg[Eerd]>>16; } @@ -926,7 +926,7 @@ print("%s: %T: too many controllers\n", name, p->tbdf); return; } - io = p->mem[0].bar&~0xf; + io = p->mem[0].bar&~(uintmem)0xf; mem = vmap(io, p->mem[0].size); if(mem == 0){ print("%s: %T: cant map bar\n", name, p->tbdf);