some chips were designed after 802.3x was ratified and do not have a Fct (flow control type) register. and if you touch Fct, the chip will hang. since this seems to be the new default, consolidate the configuration with a new configuration flag, rather than testing for each controller inlineā€”a style that has proved error prone. Reference: /n/atom/patch/applied2013/ether63nofct Date: Sat Oct 12 21:16:38 CES 2013 Signed-off-by: quanstro@quanstro.net --- /sys/src/9/pc/ether82563.c Sat Oct 12 21:16:22 2013 +++ /sys/src/9/pc/ether82563.c Sat Oct 12 21:16:23 2013 @@ -453,6 +453,7 @@ Fpba = 1<<3, Fflashea = 1<<4, F79phy = 1<<5, + Fnofct = 1<<6, }; typedef struct Ctlrtype Ctlrtype; @@ -479,12 +480,12 @@ i82577m, 1514, 2, "i82577", Fload|Fert, i82578, 4096, 2, "i82578", Fload|Fert, i82578m, 1514, 2, "i82578", Fload|Fert, - i82579, 9018, 2, "i82579", Fload|Fert|F79phy, + i82579, 9018, 2, "i82579", Fload|Fert|F79phy|Fnofct, i82580, 9728, 1, "i82580", F75|F79phy, i82583, 1514, 1, "i82583", 0, - i210, 9728, 1, "i210", F75|F79phy|Fert, - i217, 9728, 1, "i217", F75|F79phy|Fert|Fload, - i350, 9728, 1, "i350", F75|F79phy, + i210, 9728, 1, "i210", F75|F79phy|Fnofct|Fert, + i217, 9728, 1, "i217", F75|F79phy|Fnofct|Fload|Fert, + i350, 9728, 1, "i350", F75|F79phy|Fnofct, }; typedef void (*Freefn)(Block*); @@ -1829,7 +1830,7 @@ csr32w(ctlr, Mta + i*4, 0); csr32w(ctlr, Fcal, 0x00C28001); csr32w(ctlr, Fcah, 0x0100); - if(ctlr->type != i82579 && ctlr->type != i210 && ctlr->type != i217 && ctlr->type != i350) + if(cttab[ctlr->type].flag & Fnofct) csr32w(ctlr, Fct, 0x8808); csr32w(ctlr, Fcttv, 0x0100); csr32w(ctlr, Fcrtl, ctlr->fcrtl); --- /sys/src/9/pcpae/ether82563.c Sat Oct 12 21:16:26 2013 +++ /sys/src/9/pcpae/ether82563.c Sat Oct 12 21:16:28 2013 @@ -453,6 +453,7 @@ Fpba = 1<<3, Fflashea = 1<<4, F79phy = 1<<5, + Fnofct = 1<<6, }; typedef struct Ctlrtype Ctlrtype; @@ -479,12 +480,12 @@ i82577m, 1514, 2, "i82577", Fload|Fert, i82578, 4096, 2, "i82578", Fload|Fert, i82578m, 1514, 2, "i82578", Fload|Fert, - i82579, 9018, 2, "i82579", Fload|Fert|F79phy, + i82579, 9018, 2, "i82579", Fload|Fert|F79phy|Fnofct, i82580, 9728, 1, "i82580", F75|F79phy, i82583, 1514, 1, "i82583", 0, - i210, 9728, 1, "i210", F75|F79phy|Fert, - i217, 9728, 1, "i217", F75|F79phy|Fert|Fload, - i350, 9728, 1, "i350", F75|F79phy, + i210, 9728, 1, "i210", F75|F79phy|Fnofct|Fert, + i217, 9728, 1, "i217", F75|F79phy|Fnofct|Fload|Fert, + i350, 9728, 1, "i350", F75|F79phy|Fnofct, }; typedef void (*Freefn)(Block*); @@ -1829,7 +1830,7 @@ csr32w(ctlr, Mta + i*4, 0); csr32w(ctlr, Fcal, 0x00C28001); csr32w(ctlr, Fcah, 0x0100); - if(ctlr->type != i82579 && ctlr->type != i210 && ctlr->type != i217 && ctlr->type != i350) + if(cttab[ctlr->type].flag & Fnofct) csr32w(ctlr, Fct, 0x8808); csr32w(ctlr, Fcttv, 0x0100); csr32w(ctlr, Fcrtl, ctlr->fcrtl); --- /sys/src/nix/k10/ether82563.c Sat Oct 12 21:16:31 2013 +++ /sys/src/nix/k10/ether82563.c Sat Oct 12 21:16:33 2013 @@ -453,6 +453,7 @@ Fpba = 1<<3, Fflashea = 1<<4, F79phy = 1<<5, + Fnofct = 1<<6, }; typedef struct Ctlrtype Ctlrtype; @@ -479,12 +480,12 @@ i82577m, 1514, 2, "i82577", Fload|Fert, i82578, 4096, 2, "i82578", Fload|Fert, i82578m, 1514, 2, "i82578", Fload|Fert, - i82579, 9018, 2, "i82579", Fload|Fert|F79phy, + i82579, 9018, 2, "i82579", Fload|Fert|F79phy|Fnofct, i82580, 9728, 1, "i82580", F75|F79phy, i82583, 1514, 1, "i82583", 0, - i210, 9728, 1, "i210", F75|F79phy|Fert, - i217, 9728, 1, "i217", F75|F79phy|Fert|Fload, - i350, 9728, 1, "i350", F75|F79phy, + i210, 9728, 1, "i210", F75|F79phy|Fnofct|Fert, + i217, 9728, 1, "i217", F75|F79phy|Fnofct|Fload|Fert, + i350, 9728, 1, "i350", F75|F79phy|Fnofct, }; typedef void (*Freefn)(Block*); @@ -1829,7 +1830,7 @@ csr32w(ctlr, Mta + i*4, 0); csr32w(ctlr, Fcal, 0x00C28001); csr32w(ctlr, Fcah, 0x0100); - if(ctlr->type != i82579 && ctlr->type != i210 && ctlr->type != i217 && ctlr->type != i350) + if(cttab[ctlr->type].flag & Fnofct) csr32w(ctlr, Fct, 0x8808); csr32w(ctlr, Fcttv, 0x0100); csr32w(ctlr, Fcrtl, ctlr->fcrtl);