update pc-kernel only (not even in the pcpae kernel) devices to handle
64-bit bars.  it's unlikely that this will ever be used, but cleaning it up
still makes sense.

Reference: /n/atom/patch/applied/pcdevs64bitbar
Date: Sat Jan 11 20:52:42 CET 2014
Signed-off-by: quanstro@quanstro.net

--- /sys/src/9/pc/devlml.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/devlml.c	Sat Jan 11 20:52:08 2014
@@ -132,7 +132,7 @@
 static void
 lmlreset(void)
 {
-	ulong regpa;
+	uintmem regpa;
 	char name[32];
 	void *regva;
 	LML *lml;
@@ -162,9 +162,9 @@
 
 		prepbuf(lml);
 
-		print("zr36067 found at 0x%.8lux", pcidev->mem[0].bar & ~0x0F);
+		print("zr36067 found at %#P", pcidev->mem[0].bar & ~(uintmem)0xf);
 
-		regpa = pcidev->mem[0].bar & ~0x0F;
+		regpa = pcidev->mem[0].bar & ~(uintmem)0xf;
 		regva = vmap(regpa, pcidev->mem[0].size);
 		if(regva == 0){
 			print("lml: failed to map registers\n");
@@ -307,9 +307,12 @@
 		if(i >= nlml)
 			error(Eio);
 		lml = lmls+i;
-		len = snprint(lmlinfo, sizeof lmlinfo, "lml%djpg	lml%draw\nlml%d.regs	0x%lux	0x%ux\nlml%d.mjpg	0x%lux	0x%ux\n",
+		len = snprint(lmlinfo, sizeof lmlinfo,
+			"lml%djpg	lml%draw\n"
+			"lml%d.regs	%#P	%#ux\n"
+			"lml%d.mjpg	%#P	%#ux\n",
 			i, i,
-			i, lml->pcidev->mem[0].bar & ~0x0F, lml->pcidev->mem[0].size,
+			i, lml->pcidev->mem[0].bar & ~(uintmem)0xf, lml->pcidev->mem[0].size,
 			i, PADDR(lml->codedata), Codedatasize);
 		if(voff > len)
 			return 0;
--- /sys/src/9/pc/devtv.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/devtv.c	Sat Jan 11 20:52:08 2014
@@ -557,7 +557,7 @@
 		tv = &tvs[ntvs++];
 		tv->variant = &variant[i];
 		tv->pci = pci;
-		tv->bt848 = (Bt848 *)vmap(pci->mem[0].bar & ~0x0F, 4 * K);
+		tv->bt848 = (Bt848 *)vmap(pci->mem[0].bar & ~(uintmem)0xf, 4 * K);
 		if (tv->bt848 == nil)
 			panic("#V: Cannot allocate memory for Bt848");
 		bt848 = tv->bt848;
--- /sys/src/9/pc/ether82543gc.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/ether82543gc.c	Sat Jan 11 20:52:08 2014
@@ -351,7 +351,7 @@
 
 typedef struct Ctlr Ctlr;
 typedef struct Ctlr {
-	int	port;
+	uintmem	port;
 	Pcidev*	pcidev;
 	Ctlr*	next;
 	int	active;
@@ -1267,25 +1267,24 @@
 			break;
 		}
 
-		mem = vmap(p->mem[0].bar & ~0x0F, p->mem[0].size);
-		if(mem == 0){
-			print("gc82543: can't map %8.8luX\n", p->mem[0].bar);
+		mem = vmap(p->mem[0].bar & ~(uintmem)0xf, p->mem[0].size);
+		if(mem == nil){
+			print("gc82543: can't map %#P\n", p->mem[0].bar);
 			continue;
 		}
 		cls = pcicfgr8(p, PciCLS);
 		switch(cls){
-			case 0x00:
-			case 0xFF:
-				print("82543gc: unusable cache line size\n");
-				continue;
-			case 0x08:
-				break;
-			default:
-				print("82543gc: cache line size %d, expected 32\n",
-					cls*4);
+		case 0x00:
+		case 0xFF:
+			print("82543gc: unusable cache line size\n");
+			continue;
+		case 0x08:
+			break;
+		default:
+			print("82543gc: cache line size %d, expected 32\n", cls*4);
 		}
 		ctlr = malloc(sizeof(Ctlr));
-		ctlr->port = p->mem[0].bar & ~0x0F;
+		ctlr->port = p->mem[0].bar & ~(uintmem)0xf;
 		ctlr->pcidev = p;
 		ctlr->id = (p->did<<16)|p->vid;
 		ctlr->nic = mem;
--- /sys/src/9/pc/dat.h	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/dat.h	Sat Jan 11 20:52:08 2014
@@ -314,7 +314,7 @@
 
 struct ISAConf {
 	char	*type;
-	ulong	port;
+	uintmem	port;
 	int	irq;
 	ulong	dma;
 	ulong	mem;
--- /sys/src/9/pc/etherdp83820.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/etherdp83820.c	Sat Jan 11 20:52:08 2014
@@ -343,7 +343,7 @@
 
 typedef struct Ctlr Ctlr;
 typedef struct Ctlr {
-	int	port;
+	uintmem	port;
 	Pcidev*	pcidev;
 	Ctlr*	next;
 	int	active;
@@ -1159,9 +1159,9 @@
 			break;
 		}
 
-		mem = vmap(p->mem[1].bar & ~0x0F, p->mem[1].size);
-		if(mem == 0){
-			print("DP83820: can't map %8.8luX\n", p->mem[1].bar);
+		mem = vmap(p->mem[1].bar & ~(uintmem)0xf p->mem[1].size);
+		if(mem == nil){
+			print("DP83820: can't map %#P\n", p->mem[1].bar);
 			continue;
 		}
 
@@ -1170,7 +1170,7 @@
 			vunmap(mem, p->mem[1].size);
 			continue;
 		}
-		ctlr->port = p->mem[1].bar & ~0x0F;
+		ctlr->port = p->mem[1].bar & ~(uintmem)0xf;
 		ctlr->pcidev = p;
 		ctlr->id = (p->did<<16)|p->vid;
 
--- /sys/src/9/pc/etherga620.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/etherga620.c	Sat Jan 11 20:52:08 2014
@@ -252,7 +252,7 @@
 
 typedef struct Ctlr Ctlr;
 struct Ctlr {
-	int	port;
+	uintmem	port;
 	Pcidev*	pcidev;
 	Ctlr*	next;
 	int	active;
@@ -1168,9 +1168,9 @@
 			break;
 		}
 
-		mem = vmap(p->mem[0].bar & ~0x0F, p->mem[0].size);
-		if(mem == 0){
-			print("ga620: can't map %8.8luX\n", p->mem[0].bar);
+		mem = vmap(p->mem[0].bar & ~(uintmem)0xf, p->mem[0].size);
+		if(mem == nil){
+			print("ga620: can't map %#P\n", p->mem[0].bar);
 			continue;
 		}
 
@@ -1179,7 +1179,7 @@
 			vunmap(mem, p->mem[0].size);
 			continue;
 		}
-		ctlr->port = p->mem[0].bar & ~0x0F;
+		ctlr->port = p->mem[0].bar & ~(uintmem)0xf;
 		ctlr->pcidev = p;
 		ctlr->id = p->did<<16 | p->vid;
 
--- /sys/src/9/pc/sd53c8xx.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/sd53c8xx.c	Sat Jan 11 20:52:08 2014
@@ -299,7 +299,7 @@
 	Ncr *n;				/* pointer to registers */
 	Variant *v;			/* pointer to variant type */
 	ulong *script;			/* where the real script is */
-	ulong scriptpa;			/* where the real script is */
+	uintmem scriptpa;			/* where the real script is */
 	Pcidev* pcidev;
 	SDev*	sdev;
 
@@ -2090,7 +2090,8 @@
 	void *scriptma;
 	Controller *ctlr;
 	SDev *sdev, *head, *tail;
-	ulong regpa, *script, scriptpa;
+	ulong *script;
+	uintmem regpa, scriptpa;
 	void *regva, *scriptva;
 
 	if(cp = getconf("*maxsd53c8xx"))
@@ -2113,17 +2114,11 @@
 			v->name, p->rid, p->intl, p->pcr);
 
 		regpa = p->mem[1].bar;
-		ba = 2;
-		if(regpa & 0x04){
-			if(p->mem[2].bar)
-				continue;
-			ba++;
-		}
 		if(regpa == 0)
-			print("regpa 0\n");
-		regpa &= ~0xF;
-		regva = vmap(regpa, p->mem[1].size);
-		if(regva == 0)
+			continue;
+		ba = 2 + (regpa & 0x04) != 0;
+		regva = vmap(regpa & ~(uintmem)0xf, p->mem[1].size);
+		if(regva == nil)
 			continue;
 
 		script = nil;
@@ -2132,12 +2127,11 @@
 		scriptma = nil;
 		if((v->feature & LocalRAM) && sizeof(na_script) <= 4096){
 			scriptpa = p->mem[ba].bar;
-			if((scriptpa & 0x04) && p->mem[ba+1].bar){
+			if(scriptpa == 0){
 				vunmap(regva, p->mem[1].size);
 				continue;
 			}
-			scriptpa &= ~0x0F;
-			scriptva = vmap(scriptpa, p->mem[ba].size);
+			scriptva = vmap(scriptpa & ~(uintmem)0xf, p->mem[ba].size);
 			if(scriptva)
 				script = scriptva;
 		}
--- /sys/src/9/pc/uartaxp.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/uartaxp.c	Sat Jan 11 20:52:08 2014
@@ -269,7 +269,7 @@
 
 	snprint(p, READSTR,
 		"b%d c%d d%d e%d l%d m%d p%c r%d s%d i%d\n"
-		"dev(%d) type(%d) framing(%d) overruns(%d) "
+		"dev(%d) framing(%d) overruns(%d) "
 		"berr(%d) serr(%d)%s%s%s%s\n",
 
 		uart->baud,
@@ -284,7 +284,6 @@
 		0,
 
 		uart->dev,
-		uart->type,
 		uart->ferr,
 		uart->oerr,
 		uart->berr,
@@ -759,7 +758,8 @@
 	Ctlr *ctlr;
 	void *addr;
 	char name[64];
-	u32int bar, r;
+	u32int r;
+	uintmem bar;
 	int i, n, timeo;
 
 	ctlr = malloc(sizeof(Ctlr));
@@ -772,24 +772,24 @@
 	 * Access to runtime registers.
 	 */
 	bar = pcidev->mem[0].bar;
-	if((addr = vmap(bar & ~0x0F, pcidev->mem[0].size)) == 0){
-		print("%s: can't map registers at %#ux\n", ctlr->name, bar);
+	if((addr = vmap(bar & ~(uintmem)0xf, pcidev->mem[0].size)) == 0){
+		print("%s: can't map registers at %#P\n", ctlr->name, bar);
 		return axpdealloc(ctlr);
 	}
 	ctlr->reg = addr;
-	print("%s: port 0x%ux irq %d ", ctlr->name, bar, pcidev->intl);
+	print("%s: port %#P irq %d ", ctlr->name, bar, pcidev->intl);
 
 	/*
 	 * Local address space 0.
 	 */
 	bar = pcidev->mem[2].bar;
-	if((addr = vmap(bar & ~0x0F, pcidev->mem[2].size)) == 0){
-		print("%s: can't map memory at %#ux\n", ctlr->name, bar);
+	if((addr = vmap(bar & ~(uintmem)0xf, pcidev->mem[2].size)) == 0){
+		print("%s: can't map memory at %#P\n", ctlr->name, bar);
 		return axpdealloc(ctlr);
 	}
 	ctlr->mem = addr;
 	ctlr->gcb = (Gcb*)(ctlr->mem+0x10000);
-	print("mem 0x%ux size %d: ", bar, pcidev->mem[2].size);
+	print("mem %#P size %d: ", bar, pcidev->mem[2].size);
 
 	/*
 	 * Toggle the software reset and wait for
--- /sys/src/9/pc/vga3dfx.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/vga3dfx.c	Sat Jan 11 20:52:08 2014
@@ -48,12 +48,12 @@
 	else
 		return;
 	
-	scr->mmio = vmap(p->mem[0].bar&~0x0F, p->mem[0].size);
+	scr->mmio = vmap(p->mem[0].bar&~(uintmem)0xf, p->mem[0].size);
 	if(scr->mmio == nil)
 		return;
 	scr->pci = p;
 	
-	addvgaseg("3dfxmmio", p->mem[0].bar&~0x0F, p->mem[0].size);
+	addvgaseg("3dfxmmio", p->mem[0].bar&(uintmem)0xf, p->mem[0].size);
 	vgalinearpci(scr);
 	if(scr->apsize)
 		addvgaseg("3dfxscreen", scr->paddr, scr->apsize);
--- /sys/src/9/pc/vgavesa.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/vgavesa.c	Sat Jan 11 20:52:08 2014
@@ -130,7 +130,7 @@
 	int i, mode, size;
 	char *s;
 	uchar *p;
-	ulong paddr;
+	uintmem pa;
 	Pcidev *pci;
 
 	if(hardscreen) {
@@ -153,7 +153,7 @@
 	if(!(WORD(p+0) & (1<<7)))
 		error("not in linear graphics mode");
 
-	paddr = LONG(p+40);
+	pa = LONG(p+40);
 	size = WORD(p+20)*WORD(p+16);
 	size = PGROUND(size);
 
@@ -166,7 +166,7 @@
 		if(pci->ccrb != Pcibcdisp)
 			continue;
 		for(i=0; i<nelem(pci->mem); i++)
-			if(paddr == (pci->mem[i].bar&~0x0F)){
+			if(pa == (pci->mem[i].bar&~(uintmem)0xf)){
 				if(pci->mem[i].size > size)
 					size = pci->mem[i].size;
 				goto havesize;
@@ -180,7 +180,7 @@
 		size = ROUND(size, 1024*1024);
 
 havesize:
-	vgalinearaddr(scr, paddr, size);
+	vgalinearaddr(scr, pa, size);
 	if(scr->apsize)
 		addvgaseg("vesascreen", scr->paddr, scr->apsize);
 
--- /sys/src/9/pc/vgaclgd546x.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/vgaclgd546x.c	Sat Jan 11 20:52:08 2014
@@ -51,10 +51,10 @@
 	}
 
 	scr->pci = p;
-	scr->mmio = vmap(p->mem[1].bar&~0x0F, p->mem[1].size);
+	scr->mmio = vmap(p->mem[1].bar&~(uintmem)0xf, p->mem[1].size);
 	if(scr->mmio == 0)
 		return;
-	addvgaseg("clgd546xmmio", p->mem[1].bar&~0x0F, p->mem[1].size);
+	addvgaseg("clgd546xmmio", p->mem[1].bar&~(uintmem)0xf, p->mem[1].size);
 }
 
 static void
--- /sys/src/9/pc/vgacyber938x.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/vgacyber938x.c	Sat Jan 11 20:52:08 2014
@@ -54,12 +54,12 @@
 	 * here, with only the XFree86 source to guide us.
 	 */
 	if(p->mem[1].size == 0x20000)
-		scr->mmio = vmap(p->mem[1].bar & ~0x0F, p->mem[1].size);
+		scr->mmio = vmap(p->mem[1].bar & ~(uintmem)0xf, p->mem[1].size);
 
 	if(scr->apsize)
 		addvgaseg("cyber938xscreen", scr->paddr, scr->apsize);
 	if(scr->mmio)
-		addvgaseg("cyber938xmmio", p->mem[1].bar&~0x0F, 0x20000);
+		addvgaseg("cyber938xmmio", p->mem[1].bar&~(uintmem)0xf, 0x20000);
 }
 
 static void
--- /sys/src/9/pc/vgamga2164w.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/vgamga2164w.c	Sat Jan 11 20:52:08 2014
@@ -55,17 +55,17 @@
 		return;
 
 	if(p->did == MGA2064){
-		scr->mmio = vmap(p->mem[0].bar&~0x0F, p->mem[0].size);
+		scr->mmio = vmap(p->mem[0].bar&~(uintmem)0xf, p->mem[0].size);
 		if(scr->mmio == nil)
 			return;
-		addvgaseg("mga2164wmmio", p->mem[0].bar&~0x0F, p->mem[0].size);
-		vgalinearaddr(scr, p->mem[1].bar&~0x0F, 8*MB);
+		addvgaseg("mga2164wmmio", p->mem[0].bar&~(uintmem)0xf, p->mem[0].size);
+		vgalinearaddr(scr, p->mem[1].bar&~(uintmem)0xf, 8*MB);
 	}else{
-		scr->mmio = vmap(p->mem[1].bar&~0x0F, p->mem[1].size);
+		scr->mmio = vmap(p->mem[1].bar&~(uintmem)0xf, p->mem[1].size);
 		if(scr->mmio == nil)
 			return;
-		addvgaseg("mga2164wmmio", p->mem[1].bar&~0x0F, p->mem[1].size);
-		vgalinearaddr(scr, p->mem[0].bar&~0x0F, 16*MB);
+		addvgaseg("mga2164wmmio", p->mem[1].bar&~(uintmem)0xf, p->mem[1].size);
+		vgalinearaddr(scr, p->mem[0].bar&~(uintmem)0xf, 16*MB);
 	}
 	if(scr->paddr)
 		addvgaseg("mga2164wscreen", scr->paddr, scr->apsize);
--- /sys/src/9/pc/vganeomagic.c	Sat Jan 11 20:52:08 2014
+++ /sys/src/9/pc/vganeomagic.c	Sat Jan 11 20:52:09 2014
@@ -27,8 +27,8 @@
 {
 	Pcidev *p;
 	int curoff, vmsize;
-	ulong ioaddr;
-	ulong iosize;
+	uintmem ioaddr;
+	usize iosize;
 
 	/*
 	 * scr->mmio holds the virtual address of the cursor registers
@@ -50,32 +50,32 @@
 		case 0x0083:		/* MagicGraph 128ZV+ */
 			curoff = 0x100;
 			vmsize = 1152*1024;
-			ioaddr = p->mem[1].bar & ~0x0F;
+			ioaddr = p->mem[1].bar & ~(uintmem)0xf;
 			iosize = p->mem[1].size;
 			break;
 		case 0x0004:		/* MagicGraph 128XD */
 			curoff = 0x100;
 			vmsize = 2048*1024;
-			ioaddr = p->mem[1].bar & ~0x0F;
+			ioaddr = p->mem[1].bar & ~(uintmem)0xf;
 			iosize = p->mem[1].size;
 			break;
 		case 0x0005:		/* MagicMedia 256AV */
 			curoff = 0x1000;
 			vmsize = 2560*1024;
-			ioaddr = p->mem[1].bar & ~0x0F;
+			ioaddr = p->mem[1].bar & ~(uintmem)0xf;
 			iosize = p->mem[1].size;
 			break;
 		case 0x0006:		/* MagicMedia 256ZX */
 			curoff = 0x1000;
 			vmsize = 4096*1024;
-			ioaddr = p->mem[1].bar & ~0x0F;
+			ioaddr = p->mem[1].bar & ~(uintmem)0xf;
 			iosize = p->mem[1].size;
 			break;
 		case 0x0016:		/* MagicMedia 256XL+ */
 			curoff = 0x1000;
 			/* Vaio VESA BIOS says 6080, but then hwgc doesn't work */
 			vmsize = 4096*1024;
-			ioaddr = p->mem[1].bar & ~0x0F;
+			ioaddr = p->mem[1].bar & ~(uintmem)0xf;
 			iosize = p->mem[1].size;
 			break;
 		default:
--- /sys/src/9/pc/vganvidia.c	Sat Jan 11 20:52:09 2014
+++ /sys/src/9/pc/vganvidia.c	Sat Jan 11 20:52:09 2014
@@ -110,10 +110,10 @@
 	scr->id = p->did;
 	scr->pci = p;
 
-	scr->mmio = vmap(p->mem[0].bar & ~0x0F, p->mem[0].size);
+	scr->mmio = vmap(p->mem[0].bar & ~(uintmem)0xf, p->mem[0].size);
 	if(scr->mmio == nil)
 		return;
-	addvgaseg("nvidiammio", p->mem[0].bar&~0x0F, p->mem[0].size);
+	addvgaseg("nvidiammio", p->mem[0].bar&~(uintmem)0xf, p->mem[0].size);
 
 	vgalinearpci(scr);
 	if(scr->apsize)
--- /sys/src/9/pc/vgaradeon.c	Sat Jan 11 20:52:09 2014
+++ /sys/src/9/pc/vgaradeon.c	Sat Jan 11 20:52:09 2014
@@ -102,10 +102,10 @@
 	scr->id = p->did;
 	scr->pci = p;
 
-	scr->mmio = vmap(p->mem[2].bar & ~0x0f, p->mem[2].size);
+	scr->mmio = vmap(p->mem[2].bar & ~(uintmem)0xf, p->mem[2].size);
 	if(scr->mmio == 0)
 		return;
-	addvgaseg("radeonmmio", p->mem[2].bar & ~0x0f, p->mem[2].size);
+	addvgaseg("radeonmmio", p->mem[2].bar & ~(uintmem)0xf, p->mem[2].size);
 
 	vgalinearpci(scr);
 	if(scr->apsize)
--- /sys/src/9/pc/vgas3.c	Sat Jan 11 20:52:09 2014
+++ /sys/src/9/pc/vgas3.c	Sat Jan 11 20:52:09 2014
@@ -92,7 +92,8 @@
 s3linear(VGAscr* scr, int, int)
 {
 	int id, j;
-	ulong mmiobase, mmiosize;
+	uintmem mmiobase;
+	usize mmiosize;
 	Pcidev *p;
 	
 	vgalinearpciid(scr, PCIS3, 0);
@@ -119,9 +120,9 @@
 		 * much space they would need in the first design.
 		 */
 		for(j=0; j<nelem(p->mem); j++){
-			if((p->mem[j].bar&~0x0F) != scr->paddr)
+			if((p->mem[j].bar&~(uintmem)0xf) != scr->paddr)
 			if(p->mem[j].size==512*1024 || p->mem[j].size==16*1024*1024){
-				mmiobase = p->mem[j].bar & ~0x0F;
+				mmiobase = p->mem[j].bar & ~(uintmem)0xf;
 				mmiosize = 512*1024;
 				scr->mmio = vmap(mmiobase, mmiosize);
 				if(scr->mmio == nil)
--- /sys/src/9/pc/vgat2r4.c	Sat Jan 11 20:52:09 2014
+++ /sys/src/9/pc/vgat2r4.c	Sat Jan 11 20:52:09 2014
@@ -76,10 +76,10 @@
 		return;
 	scr->pci = p;
 	
-	mmio = vmap(p->mem[4].bar & ~0x0F, p->mem[4].size);
+	mmio = vmap(p->mem[4].bar & ~(uintmem)0xf, p->mem[4].size);
 	if(mmio == nil)
 		return;
-	addvgaseg("t2r4mmio", p->mem[4].bar & ~0x0F, p->mem[4].size);
+	addvgaseg("t2r4mmio", p->mem[4].bar & ~(uintmem)0xf, p->mem[4].size);
 
 	scr->mmio = mmio;
 	vgalinearpci(scr);