ulong is not uintptr, even if happens to work out in this case Reference: /n/atom/patch/applied/paeuintptr Date: Thu Jun 5 20:17:16 CES 2014 Signed-off-by: quanstro@quanstro.net --- /sys/src/9/pcpae/mmu.c Thu Jun 5 20:17:06 2014 +++ /sys/src/9/pcpae/mmu.c Thu Jun 5 20:17:08 2014 @@ -616,7 +616,7 @@ if(up->mmupdb[KSEG] == nil) upallocpdb(KSEG); seg = PDPTX(va); -D(1)print("%d: put %#.8lux %.8#P seg %d pdb %#p\n", m->machno, va, pa, seg, up->mmupdb[seg]); +D(1)print("%d: put %#p %.8#P seg %d pdb %#p\n", m->machno, va, pa, seg, up->mmupdb[seg]); if(up->mmupdb[seg] == nil) upallocpdb(seg); pdir = vpd(seg); @@ -715,14 +715,14 @@ if(!(pdir[PDX(va)]&PTEVALID) || !(vpt[VPTX(va)]&PTEVALID)) return; if(PPN(vpt[VPTX(va)]) != PPN(pa)){ - print("%d: %ld %s: va=%#.8lux pa=%#P pte=%#P\n", + print("%d: %ld %s: va=%#p pa=%#P pte=%#P\n", m->machno, up->pid, up->text, va, pa, vpt[VPTX(va)]); dumpmmu(m->pdpt); //dumpmmu(up->mmupdb); } else if(0) - print("%ld %#.8lux ok\n", up->pid, va); + print("%ld %#p ok\n", up->pid, va); } /* @@ -827,7 +827,7 @@ vmapsync(va+i); */ USED(osize); -// print("%d: vmap %#P %d => %#.8lux\n", m->machno, pa+o, osize, va+o); +// print("%d: vmap %#P %d => %#p\n", m->machno, pa+o, osize, va+o); addmemflags(pa, size, flags); return (void*)(va + o); } @@ -1091,7 +1091,7 @@ PTE *pdir, *pte; if(up == nil) - panic("kmap: up=0 pc=%#.8lux", getcallerpc(&page)); + panic("kmap: up=0 pc=%#p", getcallerpc(&page)); if(up->mmupdb[KSEG] == nil) upallocpdb(KSEG); if(up->nkmap < 0) --- /sys/src/9/pcpae/dat.h Thu Jun 5 20:17:09 2014 +++ /sys/src/9/pcpae/dat.h Thu Jun 5 20:17:10 2014 @@ -36,17 +36,17 @@ { ulong key; ulong sr; - ulong pc; + uintptr pc; Proc *p; Mach *m; ushort isilock; - long lockcycles; + uvlong lockcycles; }; struct Label { - ulong sp; - ulong pc; + uintptr sp; + uintptr pc; }; @@ -172,7 +172,7 @@ struct Mach { int machno; /* physical id of processor (KNOWN TO ASSEMBLY) */ - ulong splpc; /* pc of last caller to splhi */ + uintptr splpc; /* pc of last caller to splhi */ PTE* pdpt; /* page directory pointer table for this processor (va) */ PTE* pdb; /* kernel region page directory base for this processor (va) */