clean up the implementations of rdmsr and wrmsr.  the -w option is clunky, and
needs to be rethought.  unfortunately wire(1) doesn't support wiring a command

Reference: /n/atom/patch/applied/msrupd
Date: Sat Oct 24 18:15:10 CES 2015
Signed-off-by: quanstro@quanstro.net

--- /sys/src/cmd/aux/rdmsr.c	Sat Oct 24 18:14:20 2015
+++ /sys/src/cmd/aux/rdmsr.c	Sat Oct 24 18:14:21 2015
@@ -2,6 +2,19 @@
 #include <libc.h>
 
 void
+procwired(int mach)
+{
+	char buf[128];
+	int fd;
+
+	snprint(buf, sizeof buf, "/proc/%d/ctl", getpid());
+	fd = open(buf, OWRITE);
+	if(fprint(fd, "wired %d", mach) == -1)
+		sysfatal("procwired: %r");
+	close(fd);
+}
+
+void
 usage(void)
 {
 	fprint(2, "usage: rdmsr ...\n");
@@ -31,6 +44,9 @@
 	int i;
 
 	ARGBEGIN{
+	case 'w':
+		procwired(atoi(EARGF(usage())));
+		break;
 	default:
 		usage();
 	}ARGEND
--- /sys/src/cmd/aux/wrmsr.c	Sat Oct 24 18:14:23 2015
+++ /sys/src/cmd/aux/wrmsr.c	Sat Oct 24 18:14:24 2015
@@ -2,9 +2,22 @@
 #include <libc.h>
 
 void
+procwired(int mach)
+{
+	char buf[128];
+	int fd;
+
+	snprint(buf, sizeof buf, "/proc/%d/ctl", getpid());
+	fd = open(buf, OWRITE);
+	if(fprint(fd, "wired %d", mach) == -1)
+		sysfatal("procwired: %r");
+	close(fd);
+}
+
+void
 usage(void)
 {
-	fprint(2, "usage: %s msr value ...\n", argv0);
+	fprint(2, "usage: %s ...\n", argv0);
 	exits("usage");
 }
 
@@ -27,6 +40,9 @@
 	int i;
 
 	ARGBEGIN{
+	case 'w':
+		procwired(atoi(EARGF(usage())));
+		break;
 	default:
 		usage();
 	}ARGEND
--- /sys/man/8/rdmsr	Sat Oct 24 18:14:26 2015
+++ /sys/man/8/rdmsr	Sat Oct 24 18:14:28 2015
@@ -1,25 +1,44 @@
 .TH RDMSR 8
 .SH NAME
-rdmsr, wrmsr \- read and write x86 model specific registers
+rdmsr, wrmsr \- read and write model specific registers
 .SH SYNOPSIS
 .B aux/rdmsr
-.I msr
-...
-.br
+[
+.B -w
+.I machno
+] [
+.I msrno ...
+]
+.PP
 .B aux/wrmsr
-.I msr
-.I value
-...
+[
+.B -w
+.I machno
+] [
+.I msrno
+.I value ...
+]
 .SH DESCRIPTION
-These programs allow direct access to x86 model specific
-registers.  Since MSRs may not be read by user programs,
-they require
-.BR /dev/msr .
+These programs read and write model specific registers on architectures that support it
+using
+.B /dev/msr 
+provided by
+.IR arch (8).
+.SH EXAMPLE
+Read the APIC base
+.IP
+.EX
+aux/rdmsr 0x1b
+.EE
+.SH FILES
+.B /dev/msr
 .SH SOURCE
 .B /sys/src/cmd/aux/rdmsr.c
 .br
 .B /sys/src/cmd/aux/wrmsr.c
-.SH BUGS
-Invalid MSR references may result in a #GP trap and
-crash.
-
+.SH "SEE ALSO"
+.BR arch (3),
+.br
+.I
+Intel® 64 and IA-32 Architectures Software Developer’s Manual\fP,
+325462-056US, September 2015
--- /sys/man/3/arch	Sat Oct 24 18:14:29 2015
+++ /sys/man/3/arch	Sat Oct 24 18:14:31 2015
@@ -13,6 +13,7 @@
 .B /dev/iol
 .B /dev/iow
 .B /dev/irqalloc
+.B /dev/msr
 .SH DESCRIPTION
 This device presents textual information about PC hardware and allows
 user-level control of the I/O ports on x86-class and DEC Alpha machines.
@@ -129,21 +130,27 @@
 I/O ports.
 The port accessed is determined by the byte offset of the
 file descriptor.
+.PP
+The
+.B msr
+file allows model-specific registers to be read and written
+with the same protocol as
+.BR iob .
+MSR registers are 8 bytes on x86 platforms.
 .SH EXAMPLE
 The following code reads from an x86 byte I/O port.
 .IP
 .EX
 uchar
-inportb(unsigned port)
+inportb(uint port)
 {
     uchar data;
 
     if(iobfd == -1)
         iobfd = open("#P/iob", ORDWR);
 
-    seek(iobfd, port, 0);
-    if(read(iobfd, &data, sizeof(data)) != sizeof(data))
-        sysfatal("inportb(0x%4.4ux): %r", port);
+    if(pread(iobfd, &data, sizeof(data), port) != sizeof(data))
+        sysfatal("inportb(%#4.4ux): %r", port);
     return data;
 }
 .EE