add support for RTL8101E/G

Reference: /n/atom/patch/applied/macv40
Date: Thu Jun 12 05:24:55 CES 2014
Signed-off-by: quanstro@quanstro.net

--- /sys/src/9/pc/ether8169.c	Thu Jun 12 05:24:30 2014
+++ /sys/src/9/pc/ether8169.c	Thu Jun 12 05:24:32 2014
@@ -117,6 +117,8 @@
 	Macv27		= 0x2c800000,	/* RTL8111e */
 	Macv28		= 0x2c000000,	/* RTL8111/8168B */
 	Macv29		= 0x40800000,	/* RTL8101/8102E */
+	Macv30		= 0x24000000,	/* RTL8101E? (untested) */
+	Macv40		= 0x4c000000,	/* RTL8168G */
 	Ifg0		= 0x01000000,	/* Interframe Gap 0 */
 	Ifg1		= 0x02000000,	/* Interframe Gap 1 */
 };
@@ -169,10 +171,13 @@
 };
 
 enum {					/* Cplusc */
+	Txenb		= 0x0001,	/* enable C+ transmit */
+	Rxenb		= 0x0002,	/* enable C+ receive mode */
 	Mulrw		= 0x0008,	/* PCI Multiple R/W Enable */
 	Dac		= 0x0010,	/* PCI Dual Address Cycle Enable */
 	Rxchksum	= 0x0020,	/* Receive Checksum Offload Enable */
 	Rxvlan		= 0x0040,	/* Receive VLAN De-tagging Enable */
+	Macstatdis	= 0x0080,	/* Disable Mac Statistics */
 	Endian		= 0x0200,	/* Endian Mode */
 };
 
@@ -715,8 +720,6 @@
 	switch(ctlr->macv){
 	default:
 		panic("8169init: unknown macv: %.8ux", ctlr->macv);
-	case Macv01:
-		break;
 	case Macv02:
 	case Macv03:
 		cplusc |= 1<<14;			/* magic */
@@ -743,6 +746,11 @@
 		pcicfgw8(ctlr->pcidev, 0x68, 0x00);	/* magic */
 		pcicfgw8(ctlr->pcidev, 0x69, 0x08);	/* magic */
 		break;
+	case Macv40:
+		cplusc |= Macstatdis;
+		cplusc &= ~Rxenb;
+		break;
+	case Macv01:
 	case Macv04:
 	case Macv07:
 	case Macv07a:
@@ -756,6 +764,7 @@
 	case Macv27:
 	case Macv28:
 	case Macv29:
+	case Macv30:
 		break;
 	}
 
@@ -1127,6 +1136,8 @@
 	case Macv27:
 	case Macv28:
 	case Macv29:
+	case Macv30:
+	case Macv40:
 		break;
 	}
 	return 0;
--- /sys/src/9/pcpae/ether8169.c	Thu Jun 12 05:24:36 2014
+++ /sys/src/9/pcpae/ether8169.c	Thu Jun 12 05:24:38 2014
@@ -117,6 +117,8 @@
 	Macv27		= 0x2c800000,	/* RTL8111e */
 	Macv28		= 0x2c000000,	/* RTL8111/8168B */
 	Macv29		= 0x40800000,	/* RTL8101/8102E */
+	Macv30		= 0x24000000,	/* RTL8101E? (untested) */
+	Macv40		= 0x4c000000,	/* RTL8168G */
 	Ifg0		= 0x01000000,	/* Interframe Gap 0 */
 	Ifg1		= 0x02000000,	/* Interframe Gap 1 */
 };
@@ -169,10 +171,13 @@
 };
 
 enum {					/* Cplusc */
+	Txenb		= 0x0001,	/* enable C+ transmit */
+	Rxenb		= 0x0002,	/* enable C+ receive mode */
 	Mulrw		= 0x0008,	/* PCI Multiple R/W Enable */
 	Dac		= 0x0010,	/* PCI Dual Address Cycle Enable */
 	Rxchksum	= 0x0020,	/* Receive Checksum Offload Enable */
 	Rxvlan		= 0x0040,	/* Receive VLAN De-tagging Enable */
+	Macstatdis	= 0x0080,	/* Disable Mac Statistics */
 	Endian		= 0x0200,	/* Endian Mode */
 };
 
@@ -715,8 +720,6 @@
 	switch(ctlr->macv){
 	default:
 		panic("8169init: unknown macv: %.8ux", ctlr->macv);
-	case Macv01:
-		break;
 	case Macv02:
 	case Macv03:
 		cplusc |= 1<<14;			/* magic */
@@ -743,6 +746,11 @@
 		pcicfgw8(ctlr->pcidev, 0x68, 0x00);	/* magic */
 		pcicfgw8(ctlr->pcidev, 0x69, 0x08);	/* magic */
 		break;
+	case Macv40:
+		cplusc |= Macstatdis;
+		cplusc &= ~Rxenb;
+		break;
+	case Macv01:
 	case Macv04:
 	case Macv07:
 	case Macv07a:
@@ -756,6 +764,7 @@
 	case Macv27:
 	case Macv28:
 	case Macv29:
+	case Macv30:
 		break;
 	}
 
@@ -1127,6 +1136,8 @@
 	case Macv27:
 	case Macv28:
 	case Macv29:
+	case Macv30:
+	case Macv40:
 		break;
 	}
 	return 0;
--- /sys/src/nix/k10/ether8169.c	Thu Jun 12 05:24:41 2014
+++ /sys/src/nix/k10/ether8169.c	Thu Jun 12 05:24:43 2014
@@ -117,6 +117,8 @@
 	Macv27		= 0x2c800000,	/* RTL8111e */
 	Macv28		= 0x2c000000,	/* RTL8111/8168B */
 	Macv29		= 0x40800000,	/* RTL8101/8102E */
+	Macv30		= 0x24000000,	/* RTL8101E? (untested) */
+	Macv40		= 0x4c000000,	/* RTL8168G */
 	Ifg0		= 0x01000000,	/* Interframe Gap 0 */
 	Ifg1		= 0x02000000,	/* Interframe Gap 1 */
 };
@@ -169,10 +171,13 @@
 };
 
 enum {					/* Cplusc */
+	Txenb		= 0x0001,	/* enable C+ transmit */
+	Rxenb		= 0x0002,	/* enable C+ receive mode */
 	Mulrw		= 0x0008,	/* PCI Multiple R/W Enable */
 	Dac		= 0x0010,	/* PCI Dual Address Cycle Enable */
 	Rxchksum	= 0x0020,	/* Receive Checksum Offload Enable */
 	Rxvlan		= 0x0040,	/* Receive VLAN De-tagging Enable */
+	Macstatdis	= 0x0080,	/* Disable Mac Statistics */
 	Endian		= 0x0200,	/* Endian Mode */
 };
 
@@ -715,8 +720,6 @@
 	switch(ctlr->macv){
 	default:
 		panic("8169init: unknown macv: %.8ux", ctlr->macv);
-	case Macv01:
-		break;
 	case Macv02:
 	case Macv03:
 		cplusc |= 1<<14;			/* magic */
@@ -743,6 +746,11 @@
 		pcicfgw8(ctlr->pcidev, 0x68, 0x00);	/* magic */
 		pcicfgw8(ctlr->pcidev, 0x69, 0x08);	/* magic */
 		break;
+	case Macv40:
+		cplusc |= Macstatdis;
+		cplusc &= ~Rxenb;
+		break;
+	case Macv01:
 	case Macv04:
 	case Macv07:
 	case Macv07a:
@@ -756,6 +764,7 @@
 	case Macv27:
 	case Macv28:
 	case Macv29:
+	case Macv30:
 		break;
 	}
 
@@ -1127,6 +1136,8 @@
 	case Macv27:
 	case Macv28:
 	case Macv29:
+	case Macv30:
+	case Macv40:
 		break;
 	}
 	return 0;